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DRA821U4...ALM 数据表(PDF) 25 Page - Texas Instruments

部件名 DRA821U4...ALM
功能描述  DRA821 Jacinto™ Processors
PDF  252 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

DRA821U4...ALM 数据表(HTML) 25 Page - Texas Instruments

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Table 6-1. Pin Attributes (continued)
BALL
NUMBER
[1]
BALL
NAME
[2]
SIGNAL
NAME
[3]
MUX
MODE
[4]
TYPE
[5]
BALL
RESET
STATE
[6]
BALL
RESET
REL. MUX
MODE
[7]
I/O
VOLTAGE
VALUE
[8]
POWER
[9]
HYS
[10]
BUFFER
TYPE
[11]
PULL
UP/DOWN
TYPE
[12]
DSIS
[13]
RX
ACTIVE/
TX
DISABLE
[14]
IO
RET
[15]
W20
MCAN15_RX
MCAN15_RX
0
I
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1
1/0
Yes
RGMII2_TD1
4
O
RMII2_RXD1
5
I
0
GPIO0_38
7
IO
pad
SPI6_CS3
8
IO
1
EQEP1_I
9
IO
0
MCAN15_RX
10
I
1
MCASP2_AXR2
12
IO
0
GPMC0_A15
13
OZ
GPMC0_ADVn_ALE
14
O
W17
MCAN15_TX
MCAN15_TX
0
O
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1/0
Yes
RGMII2_TD0
4
O
RMII2_RXD0
5
I
0
GPIO0_37
7
IO
pad
SPI6_CS2
8
IO
1
EQEP1_S
9
IO
0
MCAN15_TX
10
O
GPMC0_CSn2
11
O
MCASP2_AXR1
12
IO
0
GPMC0_A0
13
OZ
GPMC0_A21
14
OZ
U21
MCAN16_RX
MCAN16_RX
0
I
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1
1/0
Yes
CLKOUT
1
OZ
RGMII4_TD0
4
O
GPIO0_46
7
IO
pad
UART7_RXD
12
I
1
GPMC0_CSn1
13
O
AUDIO_EXT_REFCLK1
14
IO
0
V15
MCAN16_TX
MCAN16_TX
0
O
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1/0
Yes
RMII_REF_CLK
1
I
0
RGMII4_RX_CTL
4
I
0
GPIO0_45
7
IO
pad
UART7_TXD
12
O
GPMC0_A14
13
OZ
H17
MCU_ADC0_AIN0
MCU_ADC0_AIN0
0
A
0
1.8 V
VDDA_ADC_MCU
ADC12BT
K18
MCU_ADC0_AIN1
MCU_ADC0_AIN1
0
A
0
1.8 V
VDDA_ADC_MCU
ADC12BT
M17
MCU_ADC0_AIN2
MCU_ADC0_AIN2
0
A
0
1.8 V
VDDA_ADC_MCU
ADC12BT
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DRA821U-Q1
SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022
Copyright © 2022 Texas Instruments Incorporated
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