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DRA821U4...ALM 数据表(PDF) 84 Page - Texas Instruments |
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DRA821U4...ALM 数据表(HTML) 84 Page - Texas Instruments |
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84 / 252 page  Table 6-106. Pin Multiplexing (continued) ADDR ESS OFFSE T REGISTER NAME BALL NUMB ER MUXMODE[15:0] SETTINGS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Bootstrap 0x1C03 0 WKUP_PADCON FIG_12 D7 MCU_OSPI 0_CSn1 MCU_HYP ERBUS0_ RESETn WKUP_GP IO0_28 0x1C03 0 PADCONFIG_12 Y18 MCAN2_T X RGMII1_T D0 RMII4_RX D0 MCAN2_T X GPIO0_13 SPI5_CS3 EHRPWM1 _A TRC_DATA 3 UART3_RX D MCASP1_ AFSX UART9_CT Sn GPMC0_A D8 0x1C03 4 PADCONFIG_13 Y19 MCAN2_R X RGMII1_T D1 RMII4_RX D1 MCAN2_R X GPIO0_14 SPI5_CS2 EHRPWM0 _B TRC_DATA 2 UART3_TX D MCASP1_ ACLKX UART9_RT Sn GPMC0_A D9 0x1C03 8 PADCONFIG_14 Y21 MCAN3_T X RGMII1_T D2 RMII4_CR S_DV MCAN3_T X GPIO0_15 SPI5_D0 EHRPWM0 _A TRC_DATA 1 MCASP0_ AXR1 GPMC0_A D10 0x1C03 8 WKUP_PADCON FIG_14 C6 MCU_OSPI 0_CSn2 MCU_OSPI 0_CSn2 MCU_HYP ERBUS0_ RESETOn MCU_HYP ERBUS0_ WPn MCU_HYP ERBUS0_ CSn1 MCU_OSPI 0_RESET_ OUT0 WKUP_GP IO0_30 0x1C03 C WKUP_PADCON FIG_15 D5 MCU_OSPI 0_CSn3 MCU_OSPI 0_CSn3 MCU_HYP ERBUS0_I NTn MCU_HYP ERBUS0_ WPn MCU_OSPI 0_RESET_ OUT1 MCU_OSPI 0_ECC_FA IL WKUP_GP IO0_31 0x1C03 C PADCONFIG_15 W16 MCAN3_R X RGMII1_T D3 RMII4_RX_ ER MCAN3_R X GPIO0_16 SPI5_CS0 EHRPWM_ TZn_IN0 TRC_DATA 0 GPMC0_A 4 MCASP0_ AXR0 SYNC2_O UT 0x1C04 0 PADCONFIG_16 W15 MCAN4_T X RGMII1_T X_CTL RMII4_TXD 0 MCAN4_T X GPIO0_17 SPI5_CLK EHRPWM0 _SYNCI TRC_CLK I2C2_SCL MCASP0_ ACLKX GPMC0_A D11 0x1C04 4 PADCONFIG_17 Y20 MCAN4_R X RGMII1_T XC RMII4_TX_ EN MCAN4_R X GPIO0_18 SPI5_D1 EHRPWM1 _B TRC_DATA 4 I2C2_SDA MCASP0_ AXR2 GPMC0_A D12 0x1C04 8 PADCONFIG_18 V21 MCAN5_T X RGMII3_R XC RMII4_TXD 1 MCAN5_T X GPIO0_19 SPI5_CS1 EHRPWM4 _B TRC_DATA 17 UART6_RT Sn MCASP0_ AXR7 GPMC0_DI R SYNC3_O UT 0x1C04 C PADCONFIG_19 V19 MCAN5_R X RGMII3_R D0 RMII3_RX D0 MCAN5_R X GPIO0_20 I2C3_SCL EHRPWM_ TZn_IN5 TRC_DATA 21 GPMC0_A 5 MCASP1_ AXR7 0x1C05 0 PADCONFIG_20 T13 MCAN6_T X RGMII3_R D1 RMII3_RX D1 MCAN6_T X GPIO0_21 I2C3_SDA EHRPWM5 _B TRC_DATA 20 GPMC0_A 6 MCASP1_ AXR6 0x1C05 4 PADCONFIG_21 U14 MCAN6_R X RGMII3_R D2 RMII3_CR S_DV MCAN6_R X GPIO0_22 EHRPWM5 _A TRC_DATA 19 MCASP1_ AXR5 GPMC0_A D13 0x1C05 8 PADCONFIG_22 U16 MCAN7_T X RGMII3_R D3 RMII3_RX_ ER MCAN7_T X GPIO0_23 SPI3_CS0 EHRPWM_ TZn_IN4 TRC_DATA 18 MCASP1_ AXR4 GPMC0_A D14 0x1C05 C PADCONFIG_23 U15 MCAN7_R X RGMII3_R X_CTL RMII3_TXD 0 MCAN7_R X GPIO0_24 SPI3_CS1 EHRPWM3 _A TRC_DATA 11 MCASP0_ AFSR GPMC0_A D15 0x1C06 0 PADCONFIG_24 T15 MCAN8_T X GPMC0_A 7 RGMII3_T D0 RMII3_TX_ EN MCAN8_T X GPIO0_25 SPI3_CS2 EHRPWM_ TZn_IN3 TRC_DATA 15 UART3_CT Sn MCASP0_ AXR5 UART0_D CDn 0x1C06 4 PADCONFIG_25 U19 MCAN8_R X RGMII3_T D1 RMII3_TXD 1 MCAN8_R X GPIO0_26 SPI3_CS3 EHRPWM3 _SYNCO TRC_DATA 14 UART3_RT Sn MCASP0_ AXR4 GPMC0_A 8 UART0_DS Rn 0x1C06 8 WKUP_PADCON FIG_26 D11 MCU_RGM II1_TX_CT L MCU_RMII 1_CRS_DV WKUP_GP IO0_29 0x1C06 8 PADCONFIG_26 T14 MCAN9_T X RGMII3_T D2 MCAN9_T X GPIO0_27 SPI3_CLK EHRPWM3 _SYNCI TRC_DATA 13 MCASP1_ AFSR GPMC0_A 9 MCASP1_ AXR10 0x1C06 C WKUP_PADCON FIG_27 A11 MCU_RGM II1_RX_CT L MCU_RMII 1_RX_ER WKUP_GP IO0_43 0x1C06 C PADCONFIG_27 U18 MCAN9_R X RGMII3_T D3 MCAN9_R X GPIO0_28 SPI3_D0 EHRPWM3 _B TRC_DATA 12 MCASP1_ ACLKR GPMC0_A 10 MCASP1_ AXR11 DRA821U-Q1 SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022 www.ti.com 84 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DRA821U-Q1 |
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