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DRA821U4...ALM 数据表(PDF) 89 Page - Texas Instruments |
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DRA821U4...ALM 数据表(HTML) 89 Page - Texas Instruments |
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89 / 252 page  Table 6-106. Pin Multiplexing (continued) ADDR ESS OFFSE T REGISTER NAME BALL NUMB ER MUXMODE[15:0] SETTINGS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Bootstrap 0x1C12 0 WKUP_PADCON FIG_72 D21 MCU_TIME R_IO6 WKUP_GP IO0_77 BOOTMOD E04 0x1C12 0 PADCONFIG_72 T4 USB0_DR VVBUS GPIO0_68 0x1C12 4 WKUP_PADCON FIG_73 B15 TCK 0x1C12 4 PADCONFIG_73 T19 PMIC_WA KE0n RGMII4_T D1 GPIO0_1 0x1C12 8 WKUP_PADCON FIG_74 B20 TRSTn 0x1C12 C WKUP_PADCON FIG_75 A13 EMU0 0x1C13 0 WKUP_PADCON FIG_76 D12 EMU1 0x1C13 4 WKUP_PADCON FIG_77 H17 MCU_ADC 0_AIN0 0x1C13 8 WKUP_PADCON FIG_78 K18 MCU_ADC 0_AIN1 0x1C13 C WKUP_PADCON FIG_79 M17 MCU_ADC 0_AIN2 0x1C14 0 WKUP_PADCON FIG_80 L18 MCU_ADC 0_AIN3 0x1C14 4 WKUP_PADCON FIG_81 J18 MCU_ADC 0_AIN4 0x1C14 8 WKUP_PADCON FIG_82 J17 MCU_ADC 0_AIN5 0x1C14 C WKUP_PADCON FIG_83 K17 MCU_ADC 0_AIN6 0x1C15 0 WKUP_PADCON FIG_84 L17 MCU_ADC 0_AIN7 0x1C16 4 PADCONFIG_89 V15 MCAN16_T X RMII_REF_ CLK RGMII4_R X_CTL GPIO0_45 UART7_TX D GPMC0_A 14 0x1C16 8 PADCONFIG_90 U21 MCAN16_ RX CLKOUT RGMII4_T D0 GPIO0_46 UART7_RX D GPMC0_C Sn1 AUDIO_EX T_REFCLK 1 0x1C17 4 WKUP_PADCON FIG_93 A15 RESET_R EQz 0x1C17 8 WKUP_PADCON FIG_94 H20 PORz 0x1C17 C WKUP_PADCON FIG_95 E19 MCU_TIME R_IO7 WKUP_GP IO0_78 BOOTMOD E05 0x1C18 0 WKUP_PADCON FIG_96 D18 WKUP_GP IO0_80 BOOTMOD E06 0x1C18 4 WKUP_PADCON FIG_97 C17 WKUP_LF _CLKIN WKUP_GP IO0_81 BOOTMOD E07 0x1C18 8 WKUP_PADCON FIG_98 F19 TDI www.ti.com DRA821U-Q1 SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 89 Product Folder Links: DRA821U-Q1 |
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