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DRA821U4...ALM 数据表(PDF) 23 Page - Texas Instruments

部件名 DRA821U4...ALM
功能描述  DRA821 Jacinto™ Processors
PDF  252 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

DRA821U4...ALM 数据表(HTML) 23 Page - Texas Instruments

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Table 6-1. Pin Attributes (continued)
BALL
NUMBER
[1]
BALL
NAME
[2]
SIGNAL
NAME
[3]
MUX
MODE
[4]
TYPE
[5]
BALL
RESET
STATE
[6]
BALL
RESET
REL. MUX
MODE
[7]
I/O
VOLTAGE
VALUE
[8]
POWER
[9]
HYS
[10]
BUFFER
TYPE
[11]
PULL
UP/DOWN
TYPE
[12]
DSIS
[13]
RX
ACTIVE/
TX
DISABLE
[14]
IO
RET
[15]
Y13
MCAN11_RX
MCAN11_RX
0
I
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1
1/0
Yes
RGMII2_RD0
4
I
0
MCAN11_RX
6
I
1
GPIO0_32
7
IO
pad
SPI2_CS1
8
IO
1
EQEP0_B
9
I
0
UART3_TXD
11
O
MCASP0_AXR14
12
IO
0
GPMC0_A12
13
OZ
UART0_RIn
14
I
1
Y14
MCAN11_TX
MCAN11_TX
0
O
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1/0
Yes
RGMII2_RXC
4
I
0
MCAN11_TX
6
O
GPIO0_31
7
IO
pad
SPI2_CS0
8
IO
1
EQEP0_A
9
I
0
SPI0_CS2
10
IO
1
UART3_RXD
11
I
1
MCASP0_AXR13
12
IO
0
GPMC0_A11
13
OZ
UART0_DTRn
14
O
AA14
MCAN12_RX
MCAN12_RX
0
I
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1
1/0
Yes
RGMII2_RD2
4
I
0
MCAN12_RX
6
I
1
GPIO0_34
7
IO
pad
SPI2_CS3
8
IO
1
EQEP1_B
9
I
0
I2C6_SDA
10
IOD
1
UART2_TXD
11
O
MCASP1_AXR8
12
IO
0
I3C0_SDAPULLEN
13
OD
GPMC0_A18
14
OZ
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DRA821U-Q1
SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022
Copyright © 2022 Texas Instruments Incorporated
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