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DRA821U4...ALM 数据表(PDF) 69 Page - Texas Instruments |
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DRA821U4...ALM 数据表(HTML) 69 Page - Texas Instruments |
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69 / 252 page  Table 6-79. SERDES0 Lane1 Signal Descriptions (continued) SIGNAL NAME [1] DESCRIPTION [2] PIN TYPE [3] BALL [4] SERDES0_TX1_P SERDES Differential Transmit Data (positive) O Y11 Table 6-80. SERDES0 Lane2 Signal Descriptions SIGNAL NAME [1] DESCRIPTION [2] PIN TYPE [3] BALL [4] SERDES0_RX2_N SERDES Differential Receive Data (negative) I Y7 SERDES0_RX2_P SERDES Differential Receive Data (positive) I Y8 SERDES0_TX2_N SERDES Differential Transmit Data (negative) O AA5 SERDES0_TX2_P SERDES Differential Transmit Data (positive) O AA6 Table 6-81. SERDES0 Lane3 Signal Descriptions SIGNAL NAME [1] DESCRIPTION [2] PIN TYPE [3] BALL [4] SERDES0_RX3_N SERDES Differential Receive Data (negative) I W5 SERDES0_RX3_P SERDES Differential Receive Data (positive) I W6 SERDES0_TX3_N SERDES Differential Transmit Data (negative) O Y4 SERDES0_TX3_P SERDES Differential Transmit Data (positive) O Y5 Table 6-82. SERDES0 Signal Descriptions SIGNAL NAME [1] DESCRIPTION [2] PIN TYPE [3] BALL [4] PCIE1_CLKREQn PCIE Clock Request Signal IO N19, W1 SERDES0_REXT(1) External Calibration Resistor A V7 SERDES0_REFCLK_N Serdes Reference Clock Input/Output (negative) IO AA8 SERDES0_REFCLK_P Serdes Reference Clock Input/Output (positive) IO AA9 (1) An external 3.01 kΩ ±1% resistor must be connected between this pin and VSS. No external voltage should be applied to this pin. 6.3.17 OSPI 6.3.17.1 MCU Domain Table 6-83. OSPI0 Signal Descriptions SIGNAL NAME [1] DESCRIPTION [2] PIN TYPE [3] BALL [4] MCU_OSPI0_CLK OSPI Clock O B6 MCU_OSPI0_DQS OSPI Data Strobe (DQS) or Loopback Clock Input I B7 MCU_OSPI0_ECC_FAIL OSPI ECC Status I D5 MCU_OSPI0_LBCLKO OSPI Loopback Clock Output IO C8 MCU_OSPI0_CSn0 OSPI Chip Select 0 (active low) O D6 MCU_OSPI0_CSn1 OSPI Chip Select 1 (active low) O D7 MCU_OSPI0_CSn2 OSPI Chip Select 2 (active low) O C6 MCU_OSPI0_CSn3 OSPI Chip Select 3 (active low) O D5 MCU_OSPI0_D0 OSPI Data 0 IO D8 MCU_OSPI0_D1 OSPI Data 1 IO C7 MCU_OSPI0_D2 OSPI Data 2 IO C5 MCU_OSPI0_D3 OSPI Data 3 IO A5 MCU_OSPI0_D4 OSPI Data 4 IO A6 MCU_OSPI0_D5 OSPI Data 5 IO B8 MCU_OSPI0_D6 OSPI Data 6 IO A8 MCU_OSPI0_D7 OSPI Data 7 IO A7 www.ti.com DRA821U-Q1 SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 69 Product Folder Links: DRA821U-Q1 |
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