DRA821U4...ALM datasheet(6/252 Pages) TI

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• Added GPMC Timing Conditions table........................................................................................................... 161

• Updated GPMC and NOR Flash Switching Characteristics – Synchronous Mode table................................162

• Updated GPMC and NOR Flash Switching Characteristics – Asynchronous Mode table..............................171

• Updated GPMC and NAND Flash Switching Characteristics – Asynchronous Mode table............................178

• (HyperBus 166 MHz Switching Characteristics): Updated/Changed the D9 and D11 Delay Time, MAX values

........................................................................................................................................................................182

• (I2C Timing): Removed all timing parameter tables and diagrams, and referenced the Philips I2C-bus™

specification version 2.1 as the source for this information. Added per port descriptions that define each

speed mode supported and included additional information that details exceptions to the I2C specification 183

• (I2C Timing): Added per port descriptions that define each speed mode supported and included additional

information that details exceptions to the I2C specification............................................................................ 183

• (I3C): Adopted inclusive terminology as Controller/Target..............................................................................184

• (I3C Open Drain Timing Conditions): Moved slew rate and output load capacitance to separate new table. 184

• (MCAN): Updated/Changed MCAN Timing Conditions and MCAN Switching Characteristics tables............ 187

• Added MCASP Timing Conditions table......................................................................................................... 187

• (MCSPI - Controller Mode): Inclusive Nomenclature Updates....................................................................... 192

• (MCSPI Timing Requirements - Controller Mode): Updated/Changed the MIN value of SM4 from "3.4" to "2.9"

ns.................................................................................................................................................................... 192

• (MCSPI Timing Requirements - Controller Mode): Updated/Changed the MIN value of SM5 from "2.7" to "2"

ns.................................................................................................................................................................... 192

• (MCSPI Switching Characteristics - Controller Mode): Updated/Changed the MAX value of SM6 from "2.11" to

"2" ns...............................................................................................................................................................192

• (MCSPI - Peripheral Mode): Inclusive Nomenclature Updates.......................................................................195

• (MCSPI Switching Characteristics - Peripheral Mode): Updated/Changed the MIN value of SS6 from "1.65" to

"2" ns...............................................................................................................................................................195

• (MMCSD0 - eMMC Interface) Added MMCSD0 Delay Mapping table updated Timing Conditions, Timing

Requirements, and Switching Characteristics table and corresponding diagrams.........................................198

• (MMCSD0 Timing Conditions): Updated/Changed the Input Conditions (slew rate) and Output Conditions

(load capacitance) parametric values for Modes: Legacy SDR, HS SDR, HS DDR (CMD) HS DDR (DAT), and

HS200.............................................................................................................................................................198

• (MMCSD0 Timing Requirements - Legacy SDR Mode): Updated the MIN values for LSDR1 thru LSDR4... 199

• (MMCSD0 Switching Characteristics - Legacy SDR Mode): Updated the MIN and MAX values for LSDR8 and

LSDR9............................................................................................................................................................ 199

• (MMCSD0 Switching Characteristics - High Speed SDR Mode): Updated the MIN and MAX values for

HSSDR8 and HSSDR9...................................................................................................................................199

• (MMCSD0 Timing Requirements - High Speed DDR Mode): Updated the MIN values for HSDDR1 and

HSDDR2......................................................................................................................................................... 200

• (MMCSD0 Switching Characteristics - High Speed DDR Mode): Updated the MAX value for HSDDR8.......200

• (MMC1 Delay Mapping for All Timing Modes): Updated/Changed DELAY ENABLE (BIT FIELD [20]) from

"0x0" to 0x1" for both Default Speed and High Speed modes........................................................................203

• (MMCSD1 Timing Conditions): Updated/Changed the PCB Connectivity Requirements [Trace Propagation

Delay] MIN for DDR50 and MIN/MAX for ALL Other Modes.......................................................................... 203

• (MMCSD1 Timing Requirements – Default Speed Mode): Updated the MIN value for DS1 thru DS4...........204

• (MMCSD1 Switching Characteristics – Default Speed Mode): Updated the MIN and MAX values for DS8 and

DS9.................................................................................................................................................................204

• (MMCSD1 Timing Requirements – High Speed Mode): Updated the MIN values for HS1 thru HS4............. 205

• (MMCSD1 Switching Characteristics – High Speed Mode): Updated the MIN and MAX values for HS8 and

HS9.................................................................................................................................................................205

• (MMCSD1 Timing Requirements – UHS-I SDR12 Mode): Updated the MIN value for SDR121 and SDR123....

205

• (MMCSD1 Switching Characteristics – UHS-I SDR12 Mode): Updated the MAX value for SDR128 and

SDR129.......................................................................................................................................................... 205

• (MMCSD1 Timing Requirements – UHS-I SDR25 Mode): Updated the MIN value for SDR251 and SDR253....

206

DRA821U-Q1

SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022

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