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DRA821U4...ALM 数据表(PDF) 27 Page - Texas Instruments

部件名 DRA821U4...ALM
功能描述  DRA821 Jacinto™ Processors
PDF  252 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

DRA821U4...ALM 数据表(HTML) 27 Page - Texas Instruments

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Table 6-1. Pin Attributes (continued)
BALL
NUMBER
[1]
BALL
NAME
[2]
SIGNAL
NAME
[3]
MUX
MODE
[4]
TYPE
[5]
BALL
RESET
STATE
[6]
BALL
RESET
REL. MUX
MODE
[7]
I/O
VOLTAGE
VALUE
[8]
POWER
[9]
HYS
[10]
BUFFER
TYPE
[11]
PULL
UP/DOWN
TYPE
[12]
DSIS
[13]
RX
ACTIVE/
TX
DISABLE
[14]
IO
RET
[15]
C6
MCU_OSPI0_CSn2
MCU_OSPI0_CSn2
0
O
OFF
7
1.8 V/3.3 V
VDDSHV1_MCU
Yes
LVCMOS
PU/PD
MCU_OSPI0_CSn2
1
O
MCU_HYPERBUS0_RESETOn
2
I
I
MCU_HYPERBUS0_WPn
3
O
MCU_HYPERBUS0_CSn1
4
O
MCU_OSPI0_RESET_OUT0
6
O
WKUP_GPIO0_30
7
IO
pad
D5
MCU_OSPI0_CSn3
MCU_OSPI0_CSn3
0
O
OFF
7
1.8 V/3.3 V
VDDSHV1_MCU
Yes
LVCMOS
PU/PD
MCU_OSPI0_CSn3
1
O
MCU_HYPERBUS0_INTn
2
I
I
MCU_HYPERBUS0_WPn
3
O
MCU_OSPI0_RESET_OUT1
5
O
MCU_OSPI0_ECC_FAIL
6
I
1
WKUP_GPIO0_31
7
IO
pad
D8
MCU_OSPI0_D0
MCU_OSPI0_D0
0
IO
OFF
7
1.8 V/3.3 V
VDDSHV1_MCU
Yes
LVCMOS
PU/PD
0
1/0
MCU_HYPERBUS0_DQ0
1
IO
0
WKUP_GPIO0_19
7
IO
pad
BOOTMODE00
Bootstrap I
C7
MCU_OSPI0_D1
MCU_OSPI0_D1
0
IO
OFF
7
1.8 V/3.3 V
VDDSHV1_MCU
Yes
LVCMOS
PU/PD
0
1/0
MCU_HYPERBUS0_DQ1
1
IO
0
WKUP_GPIO0_20
7
IO
pad
BOOTMODE01
Bootstrap I
C5
MCU_OSPI0_D2
MCU_OSPI0_D2
0
IO
OFF
7
1.8 V/3.3 V
VDDSHV1_MCU
Yes
LVCMOS
PU/PD
0
1/0
MCU_HYPERBUS0_DQ2
1
IO
0
WKUP_GPIO0_21
7
IO
pad
A5
MCU_OSPI0_D3
MCU_OSPI0_D3
0
IO
OFF
7
1.8 V/3.3 V
VDDSHV1_MCU
Yes
LVCMOS
PU/PD
0
1/0
MCU_HYPERBUS0_DQ3
1
IO
0
WKUP_GPIO0_22
7
IO
pad
A6
MCU_OSPI0_D4
MCU_OSPI0_D4
0
IO
OFF
7
1.8 V/3.3 V
VDDSHV1_MCU
Yes
LVCMOS
PU/PD
0
1/0
MCU_HYPERBUS0_DQ4
1
IO
0
WKUP_GPIO0_23
7
IO
pad
BOOTMODE02
Bootstrap I
B8
MCU_OSPI0_D5
MCU_OSPI0_D5
0
IO
OFF
7
1.8 V/3.3 V
VDDSHV1_MCU
Yes
LVCMOS
PU/PD
0
1/0
MCU_HYPERBUS0_DQ5
1
IO
0
WKUP_GPIO0_24
7
IO
pad
BOOTMODE03
Bootstrap I
www.ti.com
DRA821U-Q1
SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022
Copyright © 2022 Texas Instruments Incorporated
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