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DRA821U4...ALM 数据表(PDF) 20 Page - Texas Instruments

部件名 DRA821U4...ALM
功能描述  DRA821 Jacinto™ Processors
PDF  252 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

DRA821U4...ALM 数据表(HTML) 20 Page - Texas Instruments

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Table 6-1. Pin Attributes (continued)
BALL
NUMBER
[1]
BALL
NAME
[2]
SIGNAL
NAME
[3]
MUX
MODE
[4]
TYPE
[5]
BALL
RESET
STATE
[6]
BALL
RESET
REL. MUX
MODE
[7]
I/O
VOLTAGE
VALUE
[8]
POWER
[9]
HYS
[10]
BUFFER
TYPE
[11]
PULL
UP/DOWN
TYPE
[12]
DSIS
[13]
RX
ACTIVE/
TX
DISABLE
[14]
IO
RET
[15]
T13
MCAN6_TX
MCAN6_TX
0
O
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1/0
Yes
RGMII3_RD1
4
I
0
RMII3_RXD1
5
I
0
MCAN6_TX
6
O
GPIO0_21
7
IO
pad
I2C3_SDA
8
IOD
1
EHRPWM5_B
9
IO
0
TRC_DATA20
10
O
GPMC0_A6
11
OZ
MCASP1_AXR6
12
IO
0
U15
MCAN7_RX
MCAN7_RX
0
I
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1
1/0
Yes
RGMII3_RX_CTL
4
I
0
RMII3_TXD0
5
O
MCAN7_RX
6
I
1
GPIO0_24
7
IO
pad
SPI3_CS1
8
IO
1
EHRPWM3_A
9
IO
0
TRC_DATA11
10
O
MCASP0_AFSR
12
IO
0
GPMC0_AD15
14
IO
0
U16
MCAN7_TX
MCAN7_TX
0
O
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1/0
Yes
RGMII3_RD3
4
I
0
RMII3_RX_ER
5
I
0
MCAN7_TX
6
O
GPIO0_23
7
IO
pad
SPI3_CS0
8
IO
1
EHRPWM_TZn_IN4
9
I
0
TRC_DATA18
10
O
MCASP1_AXR4
12
IO
0
GPMC0_AD14
14
IO
0
DRA821U-Q1
SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022
www.ti.com
20
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Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: DRA821U-Q1



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