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DRA821U4...ALM 数据表(PDF) 47 Page - Texas Instruments

部件名 DRA821U4...ALM
功能描述  DRA821 Jacinto™ Processors
PDF  252 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

DRA821U4...ALM 数据表(HTML) 47 Page - Texas Instruments

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For drive strength of the associated output buffer, refer to Section 7.6, Electrical Characteristics.
12. PULL UP/DOWN TYPE: Indicates the presence of an internal pullup or pulldown resistor. Pullup and pulldown resistors can be enabled or disabled
via software.
• PU: Internal pullup
• PD: Internal pulldown
• PU/PD: Internal pullup and pulldown
• An empty box means No pull.
13. DSIS: The deselected input state (DSIS) indicates the state driven on the peripheral input (logic "0", logic "1", or "pad" level) when the peripheral pin
function is not selected by any of the PINCNTLx registers.
• 0: Logic 0 driven on the input signal port of the peripheral.
• 1: Logic 1 driven on the input signal port of the peripheral.
• pad: Logic state of the pad is driven on the input signal port of the peripheral.
• An empty box means Not Applicable.
14. RXACTIVE / TXDISABLE: This column indicates the default value of the RXACTIVE / TXDISABLE bits in the PADCONFIG register.
• RXACTIVE: 0 = receiver disabled, 1 = receiver enabled.
• TXDISABLE: 0 = driver enabled, 1 = driver disabled.
• An empty box means Not Applicable.
Note
Configuring two pins to the same input signal is not supported as it can yield unexpected results. This can be easily prevented with the
proper software configuration (HiZ mode is not an input signal).
Note
When a pad is set into a multiplexing mode which is not defined by pin multiplexing, that pad’s behavior is undefined. This should be
avoided.
15. IO RET: Indicates if wakeup and IO retention are supported.
www.ti.com
DRA821U-Q1
SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022
Copyright © 2022 Texas Instruments Incorporated
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