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DRA821U4...ALM 数据表(PDF) 22 Page - Texas Instruments

部件名 DRA821U4...ALM
功能描述  DRA821 Jacinto™ Processors
PDF  252 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

DRA821U4...ALM 数据表(HTML) 22 Page - Texas Instruments

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Table 6-1. Pin Attributes (continued)
BALL
NUMBER
[1]
BALL
NAME
[2]
SIGNAL
NAME
[3]
MUX
MODE
[4]
TYPE
[5]
BALL
RESET
STATE
[6]
BALL
RESET
REL. MUX
MODE
[7]
I/O
VOLTAGE
VALUE
[8]
POWER
[9]
HYS
[10]
BUFFER
TYPE
[11]
PULL
UP/DOWN
TYPE
[12]
DSIS
[13]
RX
ACTIVE/
TX
DISABLE
[14]
IO
RET
[15]
T14
MCAN9_TX
MCAN9_TX
0
O
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1/0
Yes
RGMII3_TD2
4
O
MCAN9_TX
6
O
GPIO0_27
7
IO
pad
SPI3_CLK
8
IO
0
EHRPWM3_SYNCI
9
I
0
TRC_DATA13
10
O
MCASP1_AFSR
12
IO
0
GPMC0_A9
13
OZ
MCASP1_AXR10
14
IO
0
U20
MCAN10_RX
MCAN10_RX
0
I
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1
1/0
Yes
RGMII3_TXC
4
O
MCAN10_RX
6
I
1
GPIO0_30
7
IO
pad
SPI2_CLK
8
IO
1
EHRPWM4_A
9
IO
0
TRC_DATA16
10
O
UART2_RTSn
11
O
MCASP0_AXR6
12
IO
0
GPMC0_BE0n_CLE
13
O
GPMC0_A16
14
OZ
U17
MCAN10_TX
MCAN10_TX
0
O
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1/0
Yes
RGMII3_TX_CTL
4
O
MCAN10_TX
6
O
GPIO0_29
7
IO
pad
SPI3_D1
8
IO
0
EHRPWM_SOCB
9
O
TRC_DATA10
10
O
UART2_CTSn
11
I
1
MCASP0_ACLKR
12
IO
0
GPMC0_WAIT1
13
I
0
GPMC0_A22
14
OZ
DRA821U-Q1
SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022
www.ti.com
22
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Product Folder Links: DRA821U-Q1



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