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DRA821U4...ALM 数据表(PDF) 40 Page - Texas Instruments

部件名 DRA821U4...ALM
功能描述  DRA821 Jacinto™ Processors
PDF  252 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

DRA821U4...ALM 数据表(HTML) 40 Page - Texas Instruments

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Table 6-1. Pin Attributes (continued)
BALL
NUMBER
[1]
BALL
NAME
[2]
SIGNAL
NAME
[3]
MUX
MODE
[4]
TYPE
[5]
BALL
RESET
STATE
[6]
BALL
RESET
REL. MUX
MODE
[7]
I/O
VOLTAGE
VALUE
[8]
POWER
[9]
HYS
[10]
BUFFER
TYPE
[11]
PULL
UP/DOWN
TYPE
[12]
DSIS
[13]
RX
ACTIVE/
TX
DISABLE
[14]
IO
RET
[15]
W14
UART8_RXD
UART8_RXD
0
I
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1
Yes
I2C4_SCL
2
IOD
IOD
MDIO0_MDIO
5
IO
0
GPIO0_42
7
IO
pad
TRC_DATA22
10
O
UART8_RXD
11
I
1
MCASP2_AFSR
12
IO
0
MCASP2_AXR4
13
IO
0
W19
UART8_TXD
UART8_TXD
0
O
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
Yes
SPI1_CS3
1
IO
1
I2C4_SDA
2
IOD
IOD
MDIO0_MDC
5
O
GPIO0_43
7
IO
pad
TRC_DATA23
10
O
UART8_TXD
11
O
MCASP2_ACLKR
12
IO
0
MCASP2_AXR5
13
IO
0
AA3
USB0_DM
USB0_DM
IO
3.3 V
VDDA_0P8_USB ,VD
DA_1P8_USB,
VDDA_3P3_USB
USB2PHY
AA2
USB0_DP
USB0_DP
IO
3.3 V
VDDA_0P8_USB ,VD
DA_1P8_USB,
VDDA_3P3_USB
USB2PHY
T4
USB0_DRVVBUS
USB0_DRVVBUS
0
O
OFF
7
1.8 V/3.3 V
VDDSHV0
Yes
LVCMOS
PU/PD
GPIO0_68
7
IO
pad
V6
USB0_ID
USB0_ID
A
3.3 V
VDDA_0P8_USB ,VD
DA_1P8_USB,
VDDA_3P3_USB
USB2PHY
V5
USB0_RCALIB
USB0_RCALIB
IO
3.3 V
VDDA_0P8_USB ,VD
DA_1P8_USB,
VDDA_3P3_USB
USB2PHY
Y2
USB0_VBUS
USB0_VBUS
A
5.0 V
VDDA_0P8_USB ,VD
DA_1P8_USB,
VDDA_3P3_USB
USB2PHY
K14, P14
VDDAR_CORE
VDDAR_CORE
PWR
J11, M10
VDDAR_CPU
VDDAR_CPU
PWR
H12, J14
VDDAR_MCU
VDDAR_MCU
PWR
K7
VDDA_0P8_PLL_DDR
VDDA_0P8_PLL_DDR
PWR
P7
VDDA_0P8_USB
VDDA_0P8_USB
PWR
M18
VDDA_0P8_DLL_MMC0
VDDA_0P8_DLL_MMC0
PWR
R8, T7, U8
VDDA_0P8_SERDES0
VDDA_0P8_SERDES0
PWR
DRA821U-Q1
SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022
www.ti.com
40
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Product Folder Links: DRA821U-Q1



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