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DRA821U4...ALM 数据表(PDF) 19 Page - Texas Instruments

部件名 DRA821U4...ALM
功能描述  DRA821 Jacinto™ Processors
PDF  252 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

DRA821U4...ALM 数据表(HTML) 19 Page - Texas Instruments

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Table 6-1. Pin Attributes (continued)
BALL
NUMBER
[1]
BALL
NAME
[2]
SIGNAL
NAME
[3]
MUX
MODE
[4]
TYPE
[5]
BALL
RESET
STATE
[6]
BALL
RESET
REL. MUX
MODE
[7]
I/O
VOLTAGE
VALUE
[8]
POWER
[9]
HYS
[10]
BUFFER
TYPE
[11]
PULL
UP/DOWN
TYPE
[12]
DSIS
[13]
RX
ACTIVE/
TX
DISABLE
[14]
IO
RET
[15]
V19
MCAN5_RX
MCAN5_RX
0
I
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1
1/0
Yes
RGMII3_RD0
4
I
0
RMII3_RXD0
5
I
0
MCAN5_RX
6
I
1
GPIO0_20
7
IO
pad
I2C3_SCL
8
IOD
1
EHRPWM_TZn_IN5
9
I
0
TRC_DATA21
10
O
GPMC0_A5
11
OZ
MCASP1_AXR7
12
IO
0
V21
MCAN5_TX
MCAN5_TX
0
O
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1/0
Yes
RGMII3_RXC
4
I
0
RMII4_TXD1
5
O
MCAN5_TX
6
O
GPIO0_19
7
IO
pad
SPI5_CS1
8
IO
1
EHRPWM4_B
9
IO
0
TRC_DATA17
10
O
UART6_RTSn
11
O
MCASP0_AXR7
12
IO
0
GPMC0_DIR
13
O
SYNC3_OUT
14
O
U14
MCAN6_RX
MCAN6_RX
0
I
OFF
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
1
1/0
Yes
RGMII3_RD2
4
I
0
RMII3_CRS_DV
5
I
0
MCAN6_RX
6
I
1
GPIO0_22
7
IO
pad
EHRPWM5_A
9
IO
0
TRC_DATA19
10
O
MCASP1_AXR5
12
IO
0
GPMC0_AD13
14
IO
0
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DRA821U-Q1
SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022
Copyright © 2022 Texas Instruments Incorporated
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