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DRA821U4...ALM 数据表(PDF) 11 Page - Texas Instruments

部件名 DRA821U4...ALM
功能描述  DRA821 Jacinto™ Processors
PDF  252 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

DRA821U4...ALM 数据表(HTML) 11 Page - Texas Instruments

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6.2 Pin Attributes
Table 6-1. Pin Attributes
BALL
NUMBER
[1]
BALL
NAME
[2]
SIGNAL
NAME
[3]
MUX
MODE
[4]
TYPE
[5]
BALL
RESET
STATE
[6]
BALL
RESET
REL. MUX
MODE
[7]
I/O
VOLTAGE
VALUE
[8]
POWER
[9]
HYS
[10]
BUFFER
TYPE
[11]
PULL
UP/DOWN
TYPE
[12]
DSIS
[13]
RX
ACTIVE/
TX
DISABLE
[14]
IO
RET
[15]
M7
CAP_VDDS0
CAP_VDDS0
PWR
G14
CAP_VDDS0_MCU
CAP_VDDS0_MCU
PWR
F9
CAP_VDDS1_MCU
CAP_VDDS1_MCU
PWR
T12
CAP_VDDS2
CAP_VDDS2
PWR
F10
CAP_VDDS2_MCU
CAP_VDDS2_MCU
PWR
L15
CAP_VDDS5
CAP_VDDS5
PWR
H1
DDR0_CKN
DDR0_CKN
IO
1.1 V
VDDS_DDR,
VDDS_DDR_C,
VDDS_DDR_BIAS
DDR
G1
DDR0_CKP
DDR0_CKP
IO
1.1 V
VDDS_DDR,
VDDS_DDR_C,
VDDS_DDR_BIAS
DDR
J5
DDR0_RESETn
DDR0_RESETn
IO
1.1 V
VDDS_DDR,
VDDS_DDR_C,
VDDS_DDR_BIAS
DDR
G4
DDR0_CA0
DDR0_CA0
IO
1.1 V
VDDS_DDR,
VDDS_DDR_C,
VDDS_DDR_BIAS
DDR
H3
DDR0_CA1
DDR0_CA1
IO
1.1 V
VDDS_DDR,
VDDS_DDR_C,
VDDS_DDR_BIAS
DDR
J4
DDR0_CA2
DDR0_CA2
IO
1.1 V
VDDS_DDR,
VDDS_DDR_C,
VDDS_DDR_BIAS
DDR
K1
DDR0_CA3
DDR0_CA3
IO
1.1 V
VDDS_DDR,
VDDS_DDR_C,
VDDS_DDR_BIAS
DDR
J2
DDR0_CA4
DDR0_CA4
IO
1.1 V
VDDS_DDR,
VDDS_DDR_C,
VDDS_DDR_BIAS
DDR
H5
DDR0_CA5
DDR0_CA5
IO
1.1 V
VDDS_DDR,
VDDS_DDR_C,
VDDS_DDR_BIAS
DDR
K5
DDR0_CAL0
DDR0_CAL0
A
1.1 V
VDDS_DDR,
VDDS_DDR_C,
VDDS_DDR_BIAS
DDRCALR
G2
DDR0_CKE0
DDR0_CKE0
IO
1.1 V
VDDS_DDR,
VDDS_DDR_C,
VDDS_DDR_BIAS
DDR
H2
DDR0_CKE1
DDR0_CKE1
IO
1.1 V
VDDS_DDR,
VDDS_DDR_C,
VDDS_DDR_BIAS
DDR
G3
DDR0_CSn0_0
DDR0_CSn0_0
IO
1.1 V
VDDS_DDR,
VDDS_DDR_C,
VDDS_DDR_BIAS
DDR
www.ti.com
DRA821U-Q1
SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022
Copyright © 2022 Texas Instruments Incorporated
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