DRA821U4...ALM datasheet(95/252 Pages) TI

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7.1 Absolute Maximum Ratings (continued)

over operating free-air temperature range (unless otherwise noted)(1) (2)

PARAMETER

MIN

MAX

UNIT

Steady State Max. Voltage at

all fail-safe IO pins

I2C0_SCL, I2C0_SDA, WKUP_I2C0_SCL,

WKUP_I2C0_SDA, MCU_I2C0_SCL, MCU_I2C0_SDA,

EXTINTn

–0.3

3.8

MCU_PORz, PORz

–0.3

3.8

VMON2_IR_VCPU

-0.3

1.05

VMON3_IR_VEXT1P8, VMON4_IR_VEXT1P8,

VMON1_ER_VSYS(8)

–0.3

2.2

VMON5_IR_VEXT3P3

–0.3

3.8

Steady State Max. Voltage at

all other IO pins(3)

All other IO pins

–0.3

IO supply voltage +

0.3

Transient Overshoot and

Undershoot specification at

IO pin

20% of IO supply voltage for up to 20% of signal period

(see Figure 7-1, IO Transient Voltage Ranges)

0.2 × VDD(6)

Latch-up Performance, Class

II (125°C)(4)

I-Test

–100

100

Over-Voltage (OV) Test

1.5 × VDD(7)

TSTG (5)

Storage temperature

-55

+150

°C

(1)

Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply

functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If

used outside the Section 7.3, Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be

fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

(2)

All voltage values are with respect to their associated VSS or VSSA_x, unless otherwise noted.

(3)

This parameter applies to all IO pins which are not fail-safe and the requirement applies to all values of IO supply voltage. For

example, if the voltage applied to a specific IO supply is 0 volts the valid input voltage range for any IO powered by that supply will be

–0.3 to +0.3 volts. Special attention should be applied anytime peripheral devices are not powered from the same power sources used

to power the respective IO supply. It is important the attached peripheral never sources a voltage outside the valid input voltage range,

including power supply ramp-up and ramp-down sequences.

(4)

For current pulse injection:

Pins stressed per JEDEC JESD78E (Class II) and passed with specified I/O pin injection current and clamp voltage of 1.5 times

maximum recommended I/O voltage and negative 0.5 times maximum recommended I/O voltage.

For overvoltage performance:

Supplies stressed per JEDEC JESD78E (Class II) and passed specified voltage injection.

(5)

For tape and reel the storage temperature range is [–10°C; +50°C] with a maximum relative humidity of 70%. TI recommends returning

to ambient room temperature before usage.

(6)

VDD is the voltage on the corresponding power-supply pin(s) for the IO.

(7)

An external resistor divider is required to create the VMON input value that triggers with VTH = 0.45 when the VSYS level reaches the

minimum allowed threshold. A series resistor R2 (VMON_ER_VSYS = VSYS × R1 / (R1 + R2)) of at least 10kΩ is recommended to limit

current.

(8)

The VMON1_ER_VSYS pin provides a way to monitor the system power supply. For more information, see Section 9.3.4 System

Power Supply Monitor Design Guidelines.

(9)

An external resistor divider is required to limit the voltage applied to this device pin. For more information, see Section 9.3.3, USB

VBUS Design Guidelines.

(10) A single 1.1V source must drive all three VDDS_DDR, VDDS_DDR_BIAS, VDDS_DDR_C supplies.

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DRA821U-Q1

SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022

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