DRA821U4...ALM datasheet(45/252 Pages) TI

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Table 6-1. Pin Attributes (continued)

BALL

NUMBER

[1]

BALL

NAME

[2]

SIGNAL

NAME

[3]

MUX

MODE

[4]

TYPE

[5]

BALL

RESET

STATE

[6]

BALL

RESET

REL. MUX

MODE

[7]

I/O

VOLTAGE

VALUE

[8]

POWER

[9]

HYS

[10]

BUFFER

TYPE

[11]

PULL

UP/DOWN

TYPE

[12]

DSIS

[13]

ACTIVE/

DISABLE

[14]

RET

[15]

E19

WKUP_GPIO0_78

MCU_TIMER_IO7

OFF

1.8 V/3.3 V

VDDSHV0_MCU

Yes

LVCMOS

PU/PD

Yes

WKUP_GPIO0_78

pad

BOOTMODE05

Bootstrap I

D18

WKUP_GPIO0_80

OFF

1.8 V/3.3 V

VDDSHV0_MCU

Yes

LVCMOS

PU/PD

pad

Yes

BOOTMODE06

Bootstrap I

C17

WKUP_GPIO0_81

WKUP_LF_CLKIN

OFF

1.8 V/3.3 V

VDDSHV0_MCU

Yes

LVCMOS

PU/PD

pad

Yes

WKUP_GPIO0_81

pad

BOOTMODE07

Bootstrap I

E18

WKUP_GPIO0_84

PMIC_WAKE1n

OFF

1.8 V/3.3 V

VDDSHV0_MCU

Yes

LVCMOS

PU/PD

MCU_EXT_REFCLK0

MCU_CPTS0_RFT_CLK

WKUP_GPIO0_84

pad

F20

WKUP_I2C0_SCL

IOD

OFF

1.8 V/3.3 V

VDDSHV0_MCU

Yes

I2C OD FS

Yes

WKUP_GPIO0_64

pad

H21

WKUP_I2C0_SDA

IOD

OFF

1.8 V/3.3 V

VDDSHV0_MCU

Yes

I2C OD FS

Yes

WKUP_GPIO0_65

pad

K21

WKUP_OSC0_XI

1.8 V

VDDA_WKUP,

VDDA_POR_WKUP

Yes

HFOSC

L21

WKUP_OSC0_XO

1.8 V

VDDA_WKUP,

VDDA_POR_WKUP

Yes

HFOSC

B14

WKUP_UART0_RXD

OFF

1.8 V/3.3 V

VDDSHV0_MCU

Yes

LVCMOS

PU/PD

1/0

Yes

WKUP_GPIO0_60

pad

A14

WKUP_UART0_TXD

OFF

1.8 V/3.3 V

VDDSHV0_MCU

Yes

LVCMOS

PU/PD

1/0

Yes

WKUP_GPIO0_61

pad

The following list describes the table column headers:

1. BALL NUMBER: Ball numbers on the bottom side associated with each signal on the bottom.

2. BALL NAME: Mechanical name from package device (name is taken from muxmode 0).

3. SIGNAL NAME: Names of signals multiplexed on each ball (also notice that the name of the ball is the signal name in muxmode 0).

Note

Table 6-1, Pin Attributes, does not take into account the subsystem multiplexing signals. Subsystem multiplexing signals are described in

Section 6.3, Signal Descriptions.

4. MUXMODE: Multiplexing mode number:

a. MUXMODE 0 is the primary muxmode. The primary muxmode is not necessarily the default muxmode.

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DRA821U-Q1

SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022

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