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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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HC705JB2GRS/H 数据表(PDF) 27 Page - NXP Semiconductors |
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HC705JB2GRS/H 数据表(HTML) 27 Page - NXP Semiconductors |
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27 / 128 page  August 28, 1998 GENERAL RELEASE SPECIFICATION CENTRAL PROCESSING UNIT REV 1.1 3-1 SECTION 3 CENTRAL PROCESSING UNIT The MC68HC705JB2 has a 8Kbyte memory map. The stack has only 64 bytes. Therefore, the stack pointer has been reduced to only 6 bits and will only decrement down to $00C0 and then wrap-around to $00FF. All other instructions and registers behave as described in this chapter. 3.1 REGISTERS The MCU contains five registers which are hard-wired within the CPU and are not part of the memory map. These five registers are shown in Figure 3-1 and are described in the following paragraphs. Figure 3-1. MC68HC05 Programming Model CONDITION CODE REGISTER I ACCUMULATOR 60 A INDEX REGISTER 71 X 4 52 3 STACK POINTER SP 14 8 15 9 12 13 10 11 PC CC 111 11 0 0 0 0 0 0 0 0 PROGRAM COUNTER H NZC HALF-CARRY BIT (FROM BIT 3) INTERRUPT MASK NEGATIVE BIT ZERO BIT CARRY BIT Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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