HC705JB2GRSSLASHH datasheet(52/128 Pages) NXP

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GENERAL RELEASE SPECIFICATION

August 28, 1998

INPUT/OUTPUT PORTS

MC68HC705JB2

7-6

REV 1.1

7.3

I/O PORT PROGRAMMING

All I/O pins can be programmed as inputs or outputs, with or without pulldown/

pullup devices.

7.3.1 Pin Data Direction

The direction of a pin is determined by the state of its corresponding bit in the

associated port Data Direction Register (DDR). A pin is conﬁgured as an output if

its corresponding DDR bit is set to a logic one. A pin is conﬁgured as an input if its

corresponding DDR bit is cleared to a logic zero.

The data direction bits DDRB0 thru DDRB2 and DDRA0 thru DDRA7 are read/

write bits which can be manipulated with read-modify-write instructions. At power-

on or reset, all DDR’s are cleared which conﬁgures all port pins as inputs. If the

pulldown/up mask option is chosen, all pins will initially power-up with their

software programmable Pulldown/ups enabled.

7.3.2 Output Pin

When an I/O pin is programmed as an output pin, the state of the corresponding

data register bit will determine the state of the pin. The state of the data register

bits can be altered by writing to address $0000 for Port A and address $0001 for

Port B. Reads of the corresponding data register bit at address $0000 or $0001

will return the state of the data register bit (not the state of the I/O pin itself).

Therefore bit manipulation is possible on all pins programmed as outputs.

If the corresponding bit in the pulldown/up register is clear (and the pulldown/up

mask option is chosen), only output pins with pullups have an activated pullup

device connected to the pin. For those pins with pulldowns and conﬁgured as

output pins, the pulldowns will be inactivated regardless of the state of the

corresponding pulldown/up register bit. Since the pulldown/up register bits are

write-only, bit manipulation should not be used on these register bits.

7.3.3 Input Pin

When an I/O pin is programmed as an input pin, the state of the pin can be

determined by reading the corresponding data register bit. Any writes to the

corresponding data register bit for an input pin will be ignored in the sense that the

written value will not be reﬂected on the pin, rather it is only reﬂected in the port

data register. Please refer to Table 7-1 and Table 7-2 for details.

If the corresponding bit in the pulldown/up register is clear (and the pulldown/up

mask option is chosen) the input pin will also have an activated pulldown/up

device. Since the pulldown/up register bits are write-only, bit manipulation should

not be used on these register bits.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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