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HC705JB2GRS/H 数据表(PDF) 96 Page - NXP Semiconductors |
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HC705JB2GRS/H 数据表(HTML) 96 Page - NXP Semiconductors |
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96 / 128 page  GENERAL RELEASE SPECIFICATION August 28, 1998 UNIVERSAL SERIAL BUS MODULE MC68HC705JB2 10-28 REV 1.1 10.6.2 Resume Interrupt The USB module will generate a USB interrupt if low speed bus activity is detected after entering the suspend state. A transition of the USB data lines to the non-idle state (“K” state) while in the suspend mode will set the RESUMF flag in the UIR1 register. There is no interrupt enable bit for this interrupt source and an interrupt will be executed if the I bit in the CCR is cleared. A resume interrupt can only occur while the MC68HC705JB2 is in the suspend mode. 10.6.3 End of Packet Interrupt The USB module can generate a USB interrupt upon detection of an end of packet signal (a single ended 0) for low speed devices. Upon detection of an SE0 sequence, the USB module sets the EOPF bit and will generate an interrupt if the EOPIE bit in the UIR1 register is set. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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