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HC705JB2GRS/H 数据表(PDF) 99 Page - NXP Semiconductors

部件名 HC705JB2GRS/H
功能描述  Industry standard M68HC05 CPU core
PDF  128 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

HC705JB2GRS/H 数据表(HTML) 99 Page - NXP Semiconductors

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August 28, 1998
GENERAL RELEASE SPECIFICATION
UNIVERSAL SERIAL BUS MODULE
REV 1.1
10-31
Figure 10-31. IN Token Data Flow for Transmit Endpoint 0
Transmit Endpoint Enabled?
(USBEN = 1)
Transmit Endpoint ready to Transfer?
(TX0E = 1) && (TXD0F = 0)
No Response
from USB function
Send NAK
Handshake
ACK received and no
Set TXD0F to 1
Transmit Endpoint
Interrupt Enabled?
(TXD0IE = 1)
No Interrupt
Valid transaction
Interrupt generated
Transmit Endpoint not Stalled by firmware?
(STALL0 = 0)
Send STALL
Handshake
Send DATA
Data PID set by T0SEQ
Valid IN token
received for Endpoint 0
N
Y
N
N
Y
Y
Y
No Response
from USB function
N
Y
Time-out condition occur?
N
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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