HC705JB2GRSSLASHH datasheet(94/128 Pages) NXP

94 / 128 page

GENERAL RELEASE SPECIFICATION

August 28, 1998

UNIVERSAL SERIAL BUS MODULE

MC68HC705JB2

10-26

REV 1.1

10.5.8 USB Endpoint 0 Data Registers (UE0D0-UE0D7)

UE0RD7 - UE0RD0 — Endpoint 0 Receive Data Buffer

These read only bits are serially loaded with OUT token or SETUP token data

received over the USB’s D+ and D- pins.

UE0TD7 - UE0TD0 — Endpoint 0 Transmit Data Buffer

These write only buffers are loaded by software with data to be sent on the

USB bus on the next IN token directed at Endpoint 0.

10.5.9 USB Endpoint 1/Endpoint 2 Data Registers (UE1D0-UE1D7)

UE1TD7 - UE1TD0 — Endpoint 1/ Endpoint 2 Transmit Data Buffer

These write only buffers are loaded by software with data to be sent on the

USB bus on the next IN token directed at Endpoint 1 or Endpoint 2. These

buffers are shared by Endpoints 1 and 2 and depend on proper conﬁguration of

the ENDADD bit.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

UE0D0

UE0RD7 UE0RD6 UE0RD5 UE0RD4 UE0RD3 UE0RD2 UE0RD1 UE0RD0

$0020

UE0TD7 UE0TD6 UE0TD5 UE0TD4 UE0TD3 UE0TD2 UE0TD1 UE0TD0

::::::::

UE0D7

UE0RD7 UE0RD6 UE0RD5 UE0RD4 UE0RD3 UE0RD2 UE0RD1 UE0RD0

$0027

UE0TD7 UE0TD6 UE0TD5 UE0TD4 UE0TD3 UE0TD2 UE0TD1 UE0TD0

reset

⇒

XXXXXXXX

Figure 10-27. USB Endpoint 0 Data Register (UE0D0-UE0D7)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

UE1D0

$0028

UE1TD7 UE1TD6 UE1TD5 UE1TD4 UE1TD3 UE1TD2 UE1TD1 UE1TD0

::::::::

UE1D7

$002F

UE1TD7 UE1TD6 UE1TD5 UE1TD4 UE1TD3 UE1TD2 UE1TD1 UE1TD0

reset

⇒

XXXXXXXX

Figure 10-28. USB Endpoint 1/Endpoint2 Data Registers (UE1D0-UE1D7)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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