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HC705JB2GRS/H 数据表(PDF) 84 Page - NXP Semiconductors

部件名 HC705JB2GRS/H
功能描述  Industry standard M68HC05 CPU core
PDF  128 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

HC705JB2GRS/H 数据表(HTML) 84 Page - NXP Semiconductors

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GENERAL RELEASE SPECIFICATION
August 28, 1998
UNIVERSAL SERIAL BUS MODULE
MC68HC705JB2
10-16
REV 1.1
Figure 10-16. NRZI Data Encoding
Figure 10-17. Flow Diagram for NRZI
Figure 10-18. Bit Stuffing
IDLE
DATA
IDLE
NRZI
0110
0
000
00
0
11
1
1
1
POWER UP
NO PACKET
TRANSMISSION
IDLE
BEGIN PACKET
FETCH THE
DATA BIT
NO
YES
NO DATA
TRANSITION
TRANSITION
IS PACKAGE
TRANSFER
DONE?
NO
YES
DATA
TRANSMISSION
IS DATA
BIT = 0?
IDLE
NRZI
ENCODED
DATA
BIT
STUFFED
DATA
RAW
DATA
STUFFED BIT
SYNC PATTERN
PACKET DATA
PACKET DATA
SYNC PATTERN
PACKET DATA
SYNC PATTERN
SIX ONES
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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