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HC705JB2GRS/H 数据表(PDF) 73 Page - NXP Semiconductors

部件名 HC705JB2GRS/H
功能描述  Industry standard M68HC05 CPU core
PDF  128 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

HC705JB2GRS/H 数据表(HTML) 73 Page - NXP Semiconductors

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August 28, 1998
GENERAL RELEASE SPECIFICATION
UNIVERSAL SERIAL BUS MODULE
REV 1.1
10-5
Figure 10-5. SOP, Sync Signaling and Voltage Levels
10.2.1.2 Packet Identifier Field
The Packet Identifier field is an eight bit number comprised of the four bit packet
identification (PID) and its complement. The field follows the sync pattern and
determines the direction and type of transaction on the bus. Table 10-1 shows the
PID values for the supported packet types.
Table 10-1. Supported Packet Identifiers
10.2.1.3 Address Field (ADDR)
The Address field is a seven bit number that is used to select a particular USB
device. This field is compared to the lower seven bits of the UADDR register to
determine if a given transaction is targeting the MC68HC705JB2 USB device.
PID Value
PID Type
%1001
IN Token
%0001
OUT Token
%1101
SETUP Token
%0011
DATA0 Packet
%1011
DATA1 Packet
%0010
ACK Handshake
%1010
NAK Handshake
%1110
STALL Handshake
END OF SYNC
FIRST BIT OF PACKET
SOP
BUS IDLE
VOH (min)
VSE (max)
VSE (min)
VOL (min)
VSS
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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