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HC705JB2GRS/H 数据表(PDF) 69 Page - NXP Semiconductors

部件名 HC705JB2GRS/H
功能描述  Industry standard M68HC05 CPU core
PDF  128 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

HC705JB2GRS/H 数据表(HTML) 69 Page - NXP Semiconductors

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August 28, 1998
GENERAL RELEASE SPECIFICATION
UNIVERSAL SERIAL BUS MODULE
REV 1.1
10-1
SECTION 10
UNIVERSAL SERIAL BUS MODULE
This USB Module is designed for USB application in LS products. With minimized
software effort, it can fully comply with USB LS device specification. See USB
specification version 1.0 for the detail description of USB.
10.1
FEATURES
Integrated 3.3 Volt Regulator with 3.3V Output Pin
Integrated USB transceiver supporting Low Speed functions
USB Data Control Logic
– Packet decoding/generation
– CRC generation and checking
– NRZI encoding/decoding
– Bit-stuffing
USB reset support
Control Endpoint 0 and Interrupt Endpoints 1 and 2
Two 8-byte transmit buffers
One 8-byte receive buffer
Suspend and resume operations
Remote Wake-up support
USB generated interrupts
transaction interrupt driven
Resume interrupt
End of Packet interrupt
STALL, NAK, and ACK handshake generation
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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