HC705JB2GRSSLASHH datasheet(55/128 Pages) NXP

55 / 128 page

August 28, 1998

GENERAL RELEASE SPECIFICATION

MULTI-FUNCTION TIMER

REV 1.1

8-1

SECTION 8

MULTI-FUNCTION TIMER

The MC68HC705JB2 core timer is a multi-function ripple counter. The features

include Timer Over Flow (TOF) and Power-On Reset (POR).

Figure 8-1. Multi-Function Timer Block Diagram

As shown in Figure 8-1, the Timer is driven by the timer clock, NTF1, divided by

four (

÷4). NTF1 has the same phase and frequency as the processor bus clock,

PH2, but is not stopped by the WAIT Modes. This signal drives an 8-bit ripple

counter. The value of this 8-bit ripple counter can be read by the CPU at any time

by accessing the Timer Counter Register (TCNT) at address $09. A timer overﬂow

RTI Select Circuit

Overflow

Circuit

Detect

fOP÷2

÷210

Internal

Timer Clock

(NTF1)

TOF

RTIF

TOFE

RTIE

RT1

RT0

RTIFR

TOFR

Timer Control & Status Register ($08)

Timer Counter Register ($09)

Interrupt Circuit

7-bit counter

MCU Internal Bus

To CPU interrupt

÷214

÷215

÷217 ÷216

÷4

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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