HC705JJ7GRSSLASHD datasheet(113/230 Pages) NXP

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Analog Subsystem

Analog Control Register

MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0

General Release Specification

Analog Subsystem

ICEN

This is a read/write bit that enables a voltage comparison to trigger the

input capture register of the programmable timer when the CPF2 flag

bit is set. Therefore, an A/D conversion could be started by receiving

an OCF or TOF from the programmable timer and then terminated

when the voltage on the external ramping capacitor reaches the level

of the unknown voltage. The time of termination will be stored in the

16-bit buffer located at $0014 and $0015. This bit is automatically set

whenever mode 2 or 3 is selected by setting the ATD2 control bit. This

bit is cleared by a reset of the device.

1 = Connects the CPF2 flag bit to the timer input capture register

0 = Connects the PB3/AN3 pin to the timer input capture register

NOTE:

In order for the input capture to occur when the output of comparator 2

goes high the IEDG bit in the TCR must also be set.

NOTE:

When the ICEN bit is set, the input capture function of the programmable

timer is not connected to the PB3/AN3/TCAP pin but is driven by the

CPF2 output flag from comparator 2. To return to capturing times from

external events, the ICEN bit must first be cleared before the timed event

occurs.

CPIE

This is a read/write bit that enables an analog interrupt when either of

the CPF1 or CPF2 flag bits is set to a logical one. This bit is cleared

by a reset of the device.

1 = Enables analog interrupts when comparator flag bits are set

0 = Disables analog interrupts when comparator flag bits are set

NOTE:

If both the ICEN and CPIE bits are set they will both generate an interrupt

by different paths. One will be the programmable timer interrupt due to

the input capture; and the other will be the analog interrupt due to the

output of comparator 2 going high. In this case the input capture interrupt

will be entered first due to its higher priority. The analog interrupt will then

need to be serviced even if the comparator 2 output has been reset or

the input capture flag (ICF) has been cleared.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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