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DSP56362P 数据表(PDF) 27 Page - Freescale Semiconductor, Inc |
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DSP56362P 数据表(HTML) 27 Page - Freescale Semiconductor, Inc |
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27 / 152 page ![]() DSP56362 Technical Data, Rev. 4 Freescale Semiconductor 3-1 3 Specifications 3.1 Introduction The DSP56362 is fabricated in high density CMOS with Transistor-Transistor Logic (TTL) compatible inputs and outputs. The DSP56362 specifications are preliminary and are from design simulations, and may not be fully tested or guaranteed. Finalized specifications will be published after full characterization and device qualifications are complete. 3.2 Maximum Ratings CAUTION This device contains circuitry protecting against damage due to high static voltage or electrical fields. However, normal precautions should be taken to avoid exceeding maximum voltage ratings. Reliability of operation is enhanced if unused inputs are pulled to an appropriate logic voltage level (e.g., either GND or VCC). The suggested value for a pullup or pulldown resistor is 10 k Ω. NOTE In the calculation of timing requirements, adding a maximum value of one specification to a minimum value of another specification does not yield a reasonable sum. A maximum specification is calculated using a worst case variation of process parameter values in one direction. The minimum specification is calculated using the worst case for the same parameters in the opposite direction. Therefore, a “maximum” value for a specification will never occur in the same device that has a “minimum” value for another specification; adding a maximum to a minimum represents a condition that can never exist. Table 3-1 Maximum Ratings Rating1 Symbol Value1 , 2 Unit Supply Voltage VCC −0.3 to +4.0 V All input voltages excluding “5 V tolerant” inputs3 VIN GND −0.3 to V CC + 0.3 V All “5 V tolerant” input voltages3 VIN5 GND −0.3 to V CC + 3.95 V Current drain per pin excluding VCC and GND I 10 mA |
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