DSP56362P datasheet(64/152 Pages) FREESCALE

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External Memory Expansion Port (Port A)

DSP56362 Technical Data, Rev. 4

3-38

Freescale Semiconductor

Figure 3-19 DRAM Refresh Access

3.10.3

Synchronous Timings (SRAM)

Table 3-17 External Bus Synchronous Timings (SRAM Access)1

No.

Characteristics

Expression2

, 3

100 MHz

Unit

Min

Max

198

CLKOUT high to address, and AA valid4

0.25

× T

C + 4.0

—

6.5

199

CLKOUT high to address, and AA invalid4

0.25

× T

2.5

—

200

TA valid to CLKOUT high (setup time)

4.0

—

201

CLKOUT high to TA invalid (hold time)

0.0

—

202

CLKOUT high to data out active

0.25

× T

2.5

—

203

CLKOUT high to data out valid

0.25

× T

C + 4.0

3.3

6.5

204

CLKOUT high to data out invalid

0.25

× T

2.5

—

205

CLKOUT high to data out high impedance

0.25

× T

—2.5

206

Data in valid to CLKOUT high (setup)

4.0

—

207

CLKOUT high to data in invalid (hold)

0.0

—

208

CLKOUT high to RD assertion

0.75

× T

C + 4.0

8.2

11.5

RAS

CAS

157

163

162

190

170

165

189

177

AA0478

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