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H8SX1663 数据表(PDF) 152 Page - Renesas Technology Corp |
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H8SX1663 数据表(HTML) 152 Page - Renesas Technology Corp |
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152 / 1158 page ![]() Section 5 Interrupt Controller Rev.1.00 Jun. 07, 2006 Page 100 of 1102 REJ09B0294-0100 Bit Bit Name Initial Value R/W Description 3 0 R Reserved This is a read-only bit and cannot be modified. 2 1 0 IPR2 IPR1 IPR0 1 1 1 R/W R/W R/W Sets the priority level of the corresponding interrupt source. 000: Priority level 0 (lowest) 001: Priority level 1 010: Priority level 2 011: Priority level 3 100: Priority level 4 101: Priority level 5 110: Priority level 6 111: Priority level 7 (highest) 5.3.4 IRQ Enable Register (IER) IER enables interrupt requests IRQ15, and IRQ11 to IRQ0. Bit Bit Name Initial Value R/W 15 IRQ15E 0 R/W 14 0 R/W 13 0 R/W 12 0 R/W 11 IRQ11E 0 R/W 10 IRQ10E 0 R/W 9 IRQ9E 0 R/W 8 IRQ8E 0 R/W Bit Bit Name Initial Value R/W 7 IRQ7E 0 R/W 6 IRQ6E 0 R/W 5 IRQ5E 0 R/W 4 IRQ4E 0 R/W 3 IRQ3E 0 R/W 2 IRQ2E 0 R/W 1 IRQ1E 0 R/W 0 IRQ0E 0 R/W Bit Bit Name Initial Value R/W Description 15 IRQ15E 0 R/W IRQ15 Enable The IRQ15 interrupt request is enabled when this bit is 1. IRQ15 is internally connected to the 32KOVI interrupt in the TM32K. 14 to 12 All 0 R/W Reserved These bits are always read as 0. The write value should always be 0. |
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