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H8SX1663 数据表(PDF) 169 Page - Renesas Technology Corp

部件名 H8SX1663
功能描述  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8SX1663 数据表(HTML) 169 Page - Renesas Technology Corp

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Section 5 Interrupt Controller
Rev.1.00 Jun. 07, 2006 Page 117 of 1102
REJ09B0294-0100
7. The CPU generates a vector address for the accepted interrupt and starts execution of the
interrupt handling routine at the address indicated by the contents of the vector address in the
vector table.
Program execution state
Interrupt generated?
NMI
IRQ0
IRQ1
TEI4
I = 0
Save PC and CCR
I
← 1
Read vector address
Branch to interrupt handling routine
Yes
No
Yes
Yes
Yes
No
No
No
Yes
Yes
No
Pending
Figure 5.3 Flowchart of Procedure Up to Interrupt Acceptance
in Interrupt Control Mode 0



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