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H8SX1663 数据表(PDF) 228 Page - Renesas Technology Corp |
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H8SX1663 数据表(HTML) 228 Page - Renesas Technology Corp |
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228 / 1158 page ![]() Section 6 Bus Controller (BSC) Rev.1.00 Jun. 07, 2006 Page 176 of 1102 REJ09B0294-0100 Table 6.3 Pin Functions in Each Interface Initial State Basic Bus Byte Control SRAM Burst ROM Address/Data Multiplexed I/O Pin Name 16 8 Single- Chip 16 8 16 16 8 16 8 Remarks B φ Output Output O O O O O O O CS0 Output Output O O O O O CS1 O O O O O CS2 O O O CS3 O O O O O CS4 O O O O O CS5 O O O O O CS6 O O O O O CS7 O O O O O BS O O O O O O O RD/ WR O O O O O O O AS Output Output O O O O O AH O O RD Output Output O O O O O O O LHWR/LUB Output Output O O O O LLWR/LLB Output Output O O O O O O O WAIT O O O O O O O Controlled by WAITE [Legend] O: Used as a bus control signal : Not used as a bus control signal (used as a port input when initialized) |
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