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ZUSBOPTSC01ZACG 数据表(PDF) 68 Page - Zilog, Inc. |
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ZUSBOPTSC01ZACG 数据表(HTML) 68 Page - Zilog, Inc. |
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68 / 282 page ![]() PS022827-1212 P R E L I M I N A R Y GPIO Control Register Definitions Z8 Encore! XP® F082A Series Product Specification 51 Port A–D Alternate Function Set 2 Subregisters The Port A–D Alternate Function Set 2 Subregister, shown in Table 28, is accessed through the Port A–D Control Register by writing 08H to the Port A–D Address Register. The Alternate Function Set 2 subregisters selects the alternate function available at a port pin. Alternate Functions selected by setting or clearing bits of this register is defined in Table 16 on page 43. Alternate function selection on the port pins must also be enabled. See the Port A–D Alter- nate Function Subregisters section on page 47 for details. Table 27. Port A–D Alternate Function Set 1 Subregisters (PxAFS1) Bit 7 6 5 4 3 2 1 0 Field PAFS17 PAFS16 PAFS15 PAFS14 PAFS13 PAFS12 PAFS11 PAFS10 RESET 00000000 R/W R/WR/W R/WR/WR/WR/WR/WR/W Address If 07H in Port A–D Address Register, accessible through the Port A–D Control Register Bit Description [7:0] PAFSx Port Alternate Function Set 1 0 = Port Alternate Function selected, as defined in Tables 15 and 16 on page 43. 1 = Port Alternate Function selected, as defined in Tables 15 and 16 on page 43. Note: x indicates the specific GPIO port pin number (7–0). Table 28. Port A–D Alternate Function Set 2 Subregisters (PxAFS2) Bit 7 6 5 4 3 2 1 0 Field PAFS27 PAFS26 PAFS25 PAFS24 PAFS23 PAFS22 PAFS21 PAFS20 RESET 00H (all ports of 20/28 pin devices); 04H (Port A of 8-pin device) R/W R/WR/W R/WR/WR/WR/WR/WR/W Address If 08H in Port A–D Address Register, accessible through the Port A–D Control Register Bit Description [7] PAFS2x Port Alternate Function Set 2 0 = Port Alternate Function selected, as defined in Table 16. 1 = Port Alternate Function selected, as defined in Table 16. Note: x indicates the specific GPIO port pin number (7–0). Note: |
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