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ZUSBOPTSC01ZACG 数据表(PDF) 25 Page - Zilog, Inc. |
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ZUSBOPTSC01ZACG 数据表(HTML) 25 Page - Zilog, Inc. |
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25 / 282 page ![]() PS022827-1212 P R E L I M I N A R Y Pin Description Z8 Encore! XP® F082A Series Product Specification 8 Pin Description The Z8 Encore! XP F082A Series products are available in a variety of packages styles and pin configurations. This chapter describes the signals and available pin configurations for each of the package styles. For information about physical package specifications, see the Packaging chapter on page 245. Available Packages The following package styles are available for each device in the Z8 Encore! XP F082A Series product line: • SOIC: 8-, 20- and 28-pin • PDIP: 8-, 20- and 28-pin • SSOP: 20- and 28- pin • QFN 8-pin (MLF-S, a QFN-style package with an 8-pin SOIC footprint) In addition, the Z8 Encore! XP F082A Series devices are available both with and without advanced analog capability (ADC, temperature sensor and op amp). Devices Z8F082A, Z8F042A, Z8F022A and Z8F012A contain the advanced analog, while devices Z8F081A, Z8F041A, Z8F021A and Z8F011A do not have the advanced analog capability. Pin Configurations Figure 2 through Figure 4 display the pin configurations for all the packages available in the Z8 Encore! XP F082A Series. See Table 2 on page 10 for a description of the signals. The analog input alternate functions (ANAx) are not available on the Z8F081A, Z8F041A, Z8F021A and Z8F011A devices. The analog supply pins (AVDD and AVSS) are also not available on these parts and are replaced by PB6 and PB7. At reset, all Port A, B and C pins default to an input state. In addition, any alternate func- tionality is not enabled, so the pins function as general purpose input ports until pro- grammed otherwise. At powerup, the PD0 pin defaults to the RESET alternate function. The pin configurations listed are preliminary and subject to change based on manufactur- ing limitations. |
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