ZUSBOPTSC01ZACG datasheet(96/282 Pages) ZILOG

96 / 282 page

PS022827-1212

P R E L I M I N A R Y

Operation

Z8 Encore! XP® F082A Series

Product Specification

If TPOL is set to 0, the ratio of the PWM output High time to the total period is repre-

sented by:

If TPOL is set to 1, the ratio of the PWM output High time to the total period is repre-

sented by:

CAPTURE Mode

In CAPTURE Mode, the current timer count value is recorded when the appropriate exter-

nal Timer Input transition occurs. The Capture count value is written to the Timer PWM

High and Low Byte registers. The timer input is the system clock. The TPOL bit in the

Timer Control Register determines if the Capture occurs on a rising edge or a falling edge

of the Timer Input signal. When the Capture event occurs, an interrupt is generated and the

timer continues counting. The INPCAP bit in TxCTL0 Register is set to indicate the timer

interrupt is because of an input capture event.

The timer continues counting up to the 16-bit reload value stored in the Timer Reload

High and Low Byte registers. Upon reaching the reload value, the timer generates an inter-

rupt and continues counting. The INPCAP bit in TxCTL0 Register clears indicating the

timer interrupt is not because of an input capture event.

Observe the following steps for configuring a timer for CAPTURE Mode and initiating

the count:

1. Write to the Timer Control Register to:

–

Disable the timer

–

Configure the timer for CAPTURE Mode

–

Set the prescale value

–

Set the Capture edge (rising or falling) for the Timer Input



2. Write to the Timer High and Low Byte registers to set the starting count value (typi-

cally 0001H).

3. Write to the Timer Reload High and Low Byte registers to set the reload value.

4. Clear the Timer PWM High and Low Byte registers to 0000H. Clearing these regis-

ters allows the software to determine if interrupts were generated by either a capture

event or a reload. If the PWM High and Low Byte registers still contain 0000H after

the interrupt, the interrupt was generated by a Reload.

PWM Output High Time Ratio (%)

Reload Value

PWM Value

–

Reload Value

------------------------------------------------------------------- 100



PWM Output High Time Ratio (%)

PWM Value

Reload Value

-------------------------------- 100



ZUSBOPTSC01ZACG 数据表(PDF) 96 Page - Zilog, Inc.

ZUSBOPTSC01ZACG 数据表(HTML) 96 Page - Zilog, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载

链接网址

ZUSBOPTSC01ZACG 数据表(PDF) 96 Page - Zilog, Inc.

ZUSBOPTSC01ZACG 数据表(HTML) 96 Page - Zilog, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表 下载

链接网址

数据表下载