ZUSBOPTSC01ZACG datasheet(45/282 Pages) ZILOG

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PS022827-1212

P R E L I M I N A R Y

Stop Mode Recovery

Z8 Encore! XP® F082A Series

Product Specification

tor address. Following Stop Mode Recovery, the STOP bit in the Reset Status (RSTSTAT)

The text following provides more detailed information about each of the Stop Mode

Recovery sources.

Stop Mode Recovery Using Watchdog Timer Time-Out

If the Watchdog Timer times out during STOP Mode, the device undergoes a Stop Mode

Recovery sequence. In the Reset Status (RSTSTAT) Register, the WDT and STOP bits are

set to 1. If the Watchdog Timer is configured to generate an interrupt upon time-out and

the Z8 Encore! XP F082A Series device is configured to respond to interrupts, the eZ8

CPU services the Watchdog Timer interrupt request following the normal Stop Mode

Recovery sequence.

Stop Mode Recovery Using a GPIO Port Pin Transition

Each of the GPIO port pins may be configured as a Stop Mode Recovery input source. On

any GPIO pin enabled as a Stop Mode Recovery source, a change in the input pin value

(from High to Low or from Low to High) initiates Stop Mode Recovery.

SMR pulses shorter than specified do not trigger a recovery (see Table 135 on page 233).

In this instance, the STOP bit in the Reset Status (RSTSTAT) Register is set to 1.

In STOP Mode, the GPIO Port Input Data registers (PxIN) are disabled. The Port Input

Data registers record the Port transition only if the signal stays on the Port pin through

the end of the Stop Mode Recovery delay. As a result, short pulses on the Port pin can

initiate Stop Mode Recovery without being written to the Port Input Data Register or

Table 10. Stop Mode Recovery Sources and Resulting Action

Operating Mode

Stop Mode Recovery Source

Action

STOP Mode

Watchdog Timer time-out when configured

for Reset

Stop Mode Recovery

Watchdog Timer time-out when configured

for interrupt

Stop Mode Recovery followed by

interrupt (if interrupts are enabled)

Data transition on any GPIO port pin enabled

as a Stop Mode Recovery source

Stop Mode Recovery

Assertion of external RESET Pin

System Reset

Debug Pin driven Low

System Reset

Note:

Caution:

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