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ZUSBOPTSC01ZACG 数据表(PDF) 35 Page - Zilog, Inc.

部件名 ZUSBOPTSC01ZACG
功能描述  High-Performance 8-Bit Microcontrollers
PDF  282 Pages
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制造商  ZILOG [Zilog, Inc.]
网页  http://www.zilog.com
标志 ZILOG - Zilog, Inc.

ZUSBOPTSC01ZACG 数据表(HTML) 35 Page - Zilog, Inc.

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PS022827-1212
P R E L I M I N A R Y
Register Map
Z8 Encore! XP® F082A Series
Product Specification
18
Register Map
Table 7 provides the address map for the Register File of the Z8 Encore! XP F082A Series
devices. Not all devices and package styles in the Z8 Encore! XP F082A Series support
the ADC, or all of the GPIO Ports. Consider registers for unimplemented peripherals as
Reserved.
Table 7. Register File Address Map
Address (Hex)
Register Description
Mnemonic
Reset (Hex)
Page
General-Purpose RAM
Z8F082A/Z8F081A Devices
000–3FF
General-Purpose Register File RAM
—
XX
400–EFF
Reserved
—
XX
Z8F042A/Z8F041A Devices
000–3FF
General-Purpose Register File RAM
—
XX
400–EFF
Reserved
—
XX
Z8F022A/Z8F021A Devices
000–1FF
General-Purpose Register File RAM
—
XX
200–EFF
Reserved
—
XX
Z8F012A/Z8F011A Devices
000–0FF
General-Purpose Register File RAM
—
XX
100–EFF
Reserved
—
XX
Timer 0
F00
Timer 0 High Byte
T0H
00
90
F01
Timer 0 Low Byte
T0L
01
90
F02
Timer 0 Reload High Byte
T0RH
FF
91
F03
Timer 0 Reload Low Byte
T0RL
FF
91
F04
Timer 0 PWM High Byte
T0PWMH
00
92
F05
Timer 0 PWM Low Byte
T0PWML
00
92
F06
Timer 0 Control 0
T0CTL0
00
85
F07
Timer 0 Control 1
T0CTL1
00
86
Notes:
1. XX = Undefined.
2. Refer to the eZ8 CPU Core User Manual (UM0128).



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