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ZUSBOPTSC01ZACG 数据表(PDF) 59 Page - Zilog, Inc. |
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ZUSBOPTSC01ZACG 数据表(HTML) 59 Page - Zilog, Inc. |
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59 / 282 page ![]() PS022827-1212 P R E L I M I N A R Y External Clock Setup Z8 Encore! XP® F082A Series Product Specification 42 Port C5 PC0 Reserved AFS1[0]: 0 ANA4/CINP ADC or Comparator Input AFS1[0]: 1 PC1 Reserved AFS1[1]: 0 ANA5/CINN ADC or Comparator Input AFS1[1]: 1 PC2 Reserved AFS1[2]: 0 ANA6/VREF 4 ADC Analog Input or ADC Voltage Refer- ence AFS1[2]: 1 PC3 COUT Comparator Output AFS1[3]: 0 Reserved AFS1[3]: 1 PC4 Reserved AFS1[4]: 0 AFS1[4]: 1 PC5 Reserved AFS1[5]: 0 AFS1[5]: 1 PC6 Reserved AFS1[6]: 0 AFS1[6]: 1 PC7 Reserved AFS1[7]: 0 AFS1[7]: 1 Port D6 PD0 RESET External Reset N/A Table 15. Port Alternate Function Mapping (Non 8-Pin Parts) (Continued) Port Pin Mnemonic Alternate Function Description Alternate Function Set Register AFS1 Notes: 1. Because there is only a single alternate function for each Port A pin, the Alternate Function Set registers are not implemented for Port A. Enabling alternate function selections automatically enables the associated alternate function. See the Port A–D Alternate Function Subregisters (PxAF) section on page 47 for details. 2. Whether PA0/PA6 takes on the timer input or timer output complement function depends on the timer configura- tion. See the Timer Pin Signal Operation section on page 84 for details. 3. Because there are at most two choices of alternate function for any pin of Port B, the Alternate Function Set Register AFS2 is not used to select the function. Alternate function selection must also be enabled. See the Port A–D Alternate Function Subregisters (PxAF) section on page 47 for details. 4. VREF is available on PB5 in 28-pin products and on PC2 in 20-pin parts. 5. Because there are at most two choices of alternate function for any pin of Port C, the Alternate Function Set Register AFS2 is not used to select the function. Alternate function selection must also be enabled. See the Port A–D Alternate Function Subregisters (PxAF) section on page 47 for details. 6. Because there is only a single alternate function for the Port PD0 pin, the Alternate Function Set registers are not implemented for Port D. Enabling alternate function selections automatically enables the associated alter- nate function. See the Port A–D Alternate Function Subregisters (PxAF) section on page 47 for details. |
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