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ZUSBOPTSC01ZACG 数据表(PDF) 51 Page - Zilog, Inc. |
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ZUSBOPTSC01ZACG 数据表(HTML) 51 Page - Zilog, Inc. |
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51 / 282 page ![]() PS022827-1212 P R E L I M I N A R Y Power Control Register Definitions Z8 Encore! XP® F082A Series Product Specification 34 operational amplifier (LPO) is OFF. To use the LPO, clear the LPO bit, turning it ON. Clearing this bit might interfere with normal ADC measurements on ANA0 (the LPO out- put). This bit enables the amplifier even in STOP Mode. If the amplifier is not required in STOP Mode, disable it. Failure to perform this results in STOP Mode currents greater than specified. This register is only reset during a POR sequence. Other system reset events do not affect it. Table 13. Power Control Register 0 (PWRCTL0) Bit 7 6 5 4 3 2 1 0 Field LPO Reserved VBO TEMP ADC COMP Reserved RESET 10000000 R/W R/WR/W R/WR/WR/WR/WR/WR/W Address F80H Bit Description [7] LPO Low-Power Operational Amplifier Disable 0 = LPO is enabled (this applies even in STOP Mode). 1 = LPO is disabled. [6:5] Reserved These bits are reserved and must be programmed to 00. [4] VBO Voltage Brown-Out Detector Disable This bit and the VBO_AO Flash option bit must both enable the VBO for the VBO to be active. 0 = VBO enabled. 1 = VBO disabled. [3] TEMP Temperature Sensor Disable 0 = Temperature Sensor enabled. 1 = Temperature Sensor disabled. [2] ADC Analog-to-Digital Converter Disable 0 = Analog-to-Digital Converter enabled. 1 = Analog-to-Digital Converter disabled. [1] COMP Comparator Disable 0 = Comparator is enabled. 1 = Comparator is disabled. [0] Reserved This bit is reserved and must be programmed to 0. Note: |
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