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数据搜索系统，热门电子元器件搜索 |
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ZUSBOPTSC01ZACG 数据表(PDF) 71 Page - Zilog, Inc. |
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ZUSBOPTSC01ZACG 数据表(HTML) 71 Page - Zilog, Inc. |
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71 / 282 page  PS022827-1212 P R E L I M I N A R Y GPIO Control Register Definitions Z8 Encore! XP® F082A Series Product Specification 54 LED Drive Level Low Register The LED Drive Level registers contain two control bits for each Port C pin (Table 33). These two bits select between four programmable drive levels. Each pin is individually programmable. Table 33. LED Drive Level Low Register (LEDLVLL) Bit 7 6 5 4 3 2 1 0 Field LEDLVLL[7:0] RESET 00000000 R/W R/WR/W R/WR/WR/WR/WR/WR/W Address F84H Bit Description [7:0] LEDLVLLx LED Level Low Bit {LEDLVLH, LEDLVLL} select one of four programmable current drive levels for each Port C pin. 00 = 3mA 01 = 7mA 10 = 13mA 11 = 20mA Note: x indicates the specific GPIO port pin number (7–0). |
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