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ZUSBOPTSC01ZACG 数据表(PDF) 37 Page - Zilog, Inc.

部件名 ZUSBOPTSC01ZACG
功能描述  High-Performance 8-Bit Microcontrollers
PDF  282 Pages
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制造商  ZILOG [Zilog, Inc.]
网页  http://www.zilog.com
标志 ZILOG - Zilog, Inc.

ZUSBOPTSC01ZACG 数据表(HTML) 37 Page - Zilog, Inc.

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PS022827-1212
P R E L I M I N A R Y
Register Map
Z8 Encore! XP® F082A Series
Product Specification
20
F85
Reserved
—
XX
Oscillator Control
F86
Oscillator Control
OSCCTL
A0
196
F87–F8F
Reserved
—
XX
Comparator 0
F90
Comparator 0 Control
CMP0
14
141
F91–FBF
Reserved
—
XX
Interrupt Controller
FC0
Interrupt Request 0
IRQ0
00
60
FC1
IRQ0 Enable High Bit
IRQ0ENH
00
63
FC2
IRQ0 Enable Low Bit
IRQ0ENL
00
63
FC3
Interrupt Request 1
IRQ1
00
61
FC4
IRQ1 Enable High Bit
IRQ1ENH
00
65
FC5
IRQ1 Enable Low Bit
IRQ1ENL
00
65
FC6
Interrupt Request 2
IRQ2
00
62
FC7
IRQ2 Enable High Bit
IRQ2ENH
00
66
FC8
IRQ2 Enable Low Bit
IRQ2ENL
00
67
FC9–FCC
Reserved
—
XX
FCD
Interrupt Edge Select
IRQES
00
68
FCE
Shared Interrupt Select
IRQSS
00
68
FCF
Interrupt Control
IRQCTL
00
69
GPIO Port A
FD0
Port A Address
PAADDR
00
44
FD1
Port A Control
PACTL
00
46
FD2
Port A Input Data
PAIN
XX
46
FD3
Port A Output Data
PAOUT
00
46
GPIO Port B
FD4
Port B Address
PBADDR
00
44
FD5
Port B Control
PBCTL
00
46
FD6
Port B Input Data
PBIN
XX
46
FD7
Port B Output Data
PBOUT
00
46
GPIO Port C
FD8
Port C Address
PCADDR
00
44
Table 7. Register File Address Map (Continued)
Address (Hex)
Register Description
Mnemonic
Reset (Hex)
Page
Notes:
1. XX = Undefined.
2. Refer to the eZ8 CPU Core User Manual (UM0128).



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