ZUSBOPTSC01ZACG datasheet(57/282 Pages) ZILOG

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PS022827-1212

P R E L I M I N A R Y

External Clock Setup

Z8 Encore! XP® F082A Series

Product Specification

Table 15. Port Alternate Function Mapping (Non 8-Pin Parts)

Port

Mnemonic

Alternate Function Description

Alternate Function

Set Register AFS1

Port A1,2 PA0

T0IN/T0OUT

Timer 0 Input/Timer 0 Output Complement N/A

Reserved

PA1

T0OUT

Timer 0 Output

Reserved

PA2

DE0

UART 0 Driver Enable

Reserved

PA3

CTS0

UART 0 Clear to Send

Reserved

PA4

RXD0/IRRX0

UART 0/IrDA 0 Receive Data

Reserved

PA5

TXD0/IRTX0

UART 0/IrDA 0 Transmit Data

Reserved

PA6

T1IN/T1OUT

Timer 1 Input/Timer 1 Output Complement

Reserved

PA7

T1OUT

Timer 1 Output

Reserved

Notes:

1. Because there is only a single alternate function for each Port A pin, the Alternate Function Set registers are not

implemented for Port A. Enabling alternate function selections automatically enables the associated alternate

function. See the Port A–D Alternate Function Subregisters (PxAF) section on page 47 for details.

2. Whether PA0/PA6 takes on the timer input or timer output complement function depends on the timer configura-

tion. See the Timer Pin Signal Operation section on page 84 for details.

3. Because there are at most two choices of alternate function for any pin of Port B, the Alternate Function Set

A–D Alternate Function Subregisters (PxAF) section on page 47 for details.

4. VREF is available on PB5 in 28-pin products and on PC2 in 20-pin parts.

5. Because there are at most two choices of alternate function for any pin of Port C, the Alternate Function Set

A–D Alternate Function Subregisters (PxAF) section on page 47 for details.

6. Because there is only a single alternate function for the Port PD0 pin, the Alternate Function Set registers are

not implemented for Port D. Enabling alternate function selections automatically enables the associated alter-

nate function. See the Port A–D Alternate Function Subregisters (PxAF) section on page 47 for details.

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