ZUSBOPTSC01ZACG datasheet(95/282 Pages) ZILOG

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PS022827-1212

P R E L I M I N A R Y

Operation

Z8 Encore! XP® F082A Series

Product Specification

delay ensures a time gap between the deassertion of one PWM output to the assertion of its

complement.

Observe the following steps for configuring a timer for PWM DUAL OUTPUT Mode and

initiating the PWM operation:

1. Write to the Timer Control Register to:

–

Disable the timer

–

Configure the timer for PWM DUAL OUTPUT Mode by writing the TMODE

bits in the TxCTL1 Register and the TMODEHI bit in TxCTL0 Register

–

Set the prescale value

–

Set the initial logic level (High or Low) and PWM High/Low transition for the

Timer Output alternate function



2. Write to the Timer High and Low Byte registers to set the starting count value (typi-

cally 0001H). This only affects the first pass in PWM mode. After the first timer reset

in PWM mode, counting always begins at the reset value of 0001H.

3. Write to the PWM High and Low Byte registers to set the PWM value.

4. Write to the PWM Control Register to set the PWM dead band delay value. The dead-

band delay must be less than the duration of the positive phase of the PWM signal (as

defined by the PWM high and low byte registers). It must also be less than the dura-

tion of the negative phase of the PWM signal (as defined by the difference between

the PWM registers and the Timer Reload registers).

5. Write to the Timer Reload High and Low Byte registers to set the reload value (PWM

period). The reload value must be greater than the PWM value.

6. If appropriate, enable the timer interrupt and set the timer interrupt priority by writing

to the relevant interrupt registers.

7. Configure the associated GPIO port pin for the Timer Output and Timer Output Com-

plement alternate functions. The Timer Output Complement function is shared with

the Timer Input function for both timers. Setting the timer mode to Dual PWM auto-

matically switches the function from Timer In to Timer Out Complement.

8. Write to the Timer Control Register to enable the timer and initiate counting.



The PWM period is represented by the following equation:

If an initial starting value other than 0001H is loaded into the Timer High and Low Byte

registers, the ONE-SHOT Mode equation determines the first PWM time-out period.

PWM Period (s)

Reload Value xPrescale

System Clock Frequency (Hz)

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