ZUSBOPTSC01ZACG datasheet(178/282 Pages) ZILOG

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PS022827-1212

P R E L I M I N A R Y

Flash Option Bit Control Register

Z8 Encore! XP® F082A Series

Product Specification

161

These serial numbers are stored in the Flash information page and are unaffected by mass

erasure of the device's Flash memory. See the Reading the Flash Information Page section

below and the Serialization Data section on page 173 for more details.

Randomized Lot Identification Bits

As an optional feature, Zilog is able to provide a factory-programmed random lot identi-

fier. With this feature, all devices in a given production lot are programmed with the same

random number. This random number is uniquely regenerated for each successive produc-

tion lot and is not likely to be repeated.

The randomized lot identifier is a 32 byte binary value, stored in the Flash information

page and is unaffected by mass erasure of the device’s Flash memory. See Reading the

Flash Information Page, below, and the Randomized Lot Identifier section on page 174 for

more details.

Reading the Flash Information Page

The following code example shows how to read data from the Flash information area.

; get value at info address 60 (FE60h)

ldx FPS, #%80 ; enable access to flash info page

ld R0, #%FE

ld R1, #%60

ldc R2, @RR0 ; R2 now contains the calibration value

Flash Option Bit Control Register Definitions

This section briefly describes the features of the Trim Bit Address and Data registers.

Trim Bit Address Register

The Trim Bit Address (TRMADR) Register contains the target address for an access to the

trim option bits (Table 86).

Table 86. Trim Bit Address Register (TRMADR)

Bit

Field

TRMADR: Trim Bit Address (00H to 1FH)

RESET

00000000

R/W

R/WR/W

R/WR/WR/WR/WR/WR/W

Address

FF6H

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