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WM8944BECS/R 数据表(PDF) 118 Page - Cirrus Logic

部件名 WM8944BECS/R
功能描述  Mono Low-Power CODEC with Video Buffer
PDF  165 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

WM8944BECS/R 数据表(HTML) 118 Page - Cirrus Logic

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WM8944B
118
Rev 4.3
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
1
ADCR_
DATINV
0
Right ADC Data Invert
0 = Right ADC output not inverted
1 = Right ADC output inverted
0
ADCL_DATINV
0
Left ADC Data Invert
0 = ADC output not inverted
1 = ADC output inverted
Register 19h ADC Control 1
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R26 (1Ah)
ADC
Control 2
6
ADC_HPF_
MODE
0
Sets the ADC HPF response (1st or 2nd order).
0 = Audio mode (1st order)
1 = Application mode (2nd order)
5:4
ADC_HPF_SR
[1:0]
10
ADC HPF sample frequency range
00 = 8kHz to 12kHz
01 = 16kHz to 24kHz
10 = 32kHz to 48kHz
11 = 88kHz to 96kHz
3:1
ADC_HPF_
CUT [2:0]
000
High pass filter configuration.
See Table 11 for cut-off frequencies at all supported
sample rates.
Table 11
0
ADC_HPF
1
ADC Digital High Pass Filter Enable
0 = Disabled
1 = Enabled
Register 1Ah ADC Control 2
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R27 (1Bh)
Left ADC
Digital Vol
12
ADC_VU
0
ADC Volume Update
Writing a 1 to this bit enables the Left ADC volume to be
updated
8
ADCL_MUTE
0
Left ADC Digital Mute
0 = Disable Mute
1 = Enable Mute
7:0
ADCL_VOL [7:0]
1100_0000
Left ADC Digital Volume
0000_0000 = mute
0000_0001 = -71.625dB
0000_0010 = -71.250dB
…
1100_0000 = 0dB
...
1111_1111 = +23.625dB
Table 9
Register 1Bh Left ADC Digital Vol
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R28 (1Ch)
Right ADC
12
ADC_VU
0
ADC Volume Update
Writing a 1 to this bit will cause Left and Right ADC volume



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