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WM8944BECS/R 数据表(PDF) 120 Page - Cirrus Logic |
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WM8944BECS/R 数据表(HTML) 120 Page - Cirrus Logic |
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120 / 165 page  WM8944B 120 Rev 4.3 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 4:2 DRC_MINGAIN [2:0] 001 Minimum gain the DRC can use to attenuate audio signals 000 = 0dB 001 = -12dB (default) 010 = -18dB 011 = -24dB 100 = -36dB 101 = Reserved 11X = Reserved 1:0 DRC_ MAXGAIN [1:0] 01 Maximum gain the DRC can use to boost audio signals (dB) 00 = 12dB 01 = 18dB 10 = 24dB 11 = 36dB Register 1Eh DRC Control 2 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R31 (1Fh) DRC Control 3 7:4 DRC_ATK [3:0] 0100 Attack rate relative to the input signal (seconds/6dB) 0000 = Reserved 0001 = 181us 0010 = 363us 0011 = 726us 0100 = 1.45ms 0101 = 2.9ms 0110 = 5.8ms 0111 = 11.6ms 1000 = 23.2ms 1001 = 46.4ms 1010 = 92.8ms 1011 = 185.6ms 1100-1111 = Reserved 3:0 DRC_DCY [3:0] 0010 Decay rate relative to the input signal (seconds/6dB) 0000 = 186ms 0001 = 372ms 0010 = 743ms 0011 = 1.49s 0100 = 2.97s 0101 = 5.94s 0110 = 11.89s 0111 = 23.78s 1000 = 47.56s 1001-1111 = Reserved Register 1Fh DRC Control 3 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R32 (20h) DRC Control 4 12:8 DRC_KNEE2_ IP [4:0] 0_0000 Input signal level at the Noise Gate threshold ‘Knee2’. 00000 = -36dB 00001 = -37.5dB 00010 = -39dB Table 18 |
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