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WM8944BECS/R 数据表(PDF) 129 Page - Cirrus Logic |
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WM8944BECS/R 数据表(HTML) 129 Page - Cirrus Logic |
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129 / 165 page  WM8944B Rev 4.3 129 Register 40h SE Config Selection REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R65 (41h) SE1_LHPF_ CONFIG 5 SE1_LHPF_R_S IGN 0 SE1_LHPF_R_SIGN 0 : sum internal result (LPF) 1 : sub internal result (HPF) 4 SE1_LHPF_L_S IGN 0 SE1_LHPF_L_SIGN 0 : sum internal result (LPF) 1 : sub internal result (HPF) 1 SE1_LHPF_R_E NA 0 SE1 Right channel low-pass / high-pass filter enable 0 = Disabled 1 = Enabled 0 SE1_LHPF_L_E NA 0 SE1 Left channel low-pass / high-pass filter enable 0 = Disabled 1 = Enabled Register 41h SE1_LHPF_CONFIG REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R66 (42h) SE1_LHPF 15:0 SE1_LHPF_L [15:0] 0000_0000 _0000_000 0 SE1_LHPF left coefficent Register 42h SE1_LHPF REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R67 (43h) SE1_LHPF_ R 15:0 SE1_LHPF_R [15:0] 0000_0000 _0000_000 0 SE1_LHPF right channel coefficent Register 43h SE1_LHPF_R REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R68 (44h) SE1_3DCON FIG 9 SE1_3D_R _SIGN 0 SE1_3D_R_SIGN 0 : add cross path values 1 : sub cross path values 8 SE1_3D_L _SIGN 0 SE1_3D_L_SIGN 0 : add cross path values 1 : sub cross path values 7 SE1_3D_LHPF_ R_ENA 0 SE1_3D_LHPF_R_ENA : 0 : R channel disabled (bypass coeffs applied) 1 : R channel enabled (bank coeffs applied) 6 SE1_3D_LHPF_ L_ENA 0 SE1_3D_LHPF_L_ENA : 0 : L channel disabled (bypass coeffs applied) 1 : L channel enabled (bank coeffs applied) 5 SE1_3D_R_ LHPF_SIGN 0 SE1_3D_R_LHPF_SIGN 0 : sum internal result (LPF) 1 : sub internal result (HPF) 4 SE1_3D_L_ LHPF_SIGN 0 SE1_3D_L_LHPF_SIGN 0 : sum internal result (LPF) |
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