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WM8944BECS/R 数据表(PDF) 125 Page - Cirrus Logic

部件名 WM8944BECS/R
功能描述  Mono Low-Power CODEC with Video Buffer
PDF  165 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

WM8944BECS/R 数据表(HTML) 125 Page - Cirrus Logic

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WM8944B
Rev 4.3
125
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
6
SPKP_DISCH
0
Discharges SPKOUTP output via approx 550 ohm resistor
0 = Not active
1 = Actively discharging SPKOUTP
4
LINE_DISCH
0
Discharges LINEOUT output via approx 550 ohm resistor
0 = Not active
1 = Actively discharging LINEOUT
1
SPK_VROI
0
Buffered VREF to SPKOUTP / SPKOUTN resistance
(Disabled outputs)
0 = approx 20k ohms
1 = approx 1k4 ohms
0
LINE_VROI
0
Buffered VREF to LINEOUT resistance (Disabled output)
0 = approx 20k ohms
1 = approx 1k1 ohms
Register 2Ah Output ctrl
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R43 (2Bh)
SPK mixer
control1
10
AUXDIFF_TO_P
GA
0
Differential AUX/IN1 to Speaker PGA Mixer select
0 = Disabled
1 = Enabled
9
IN1_TO_PGA
0
IN1 to Speaker PGA Mixer select
0 = Disabled
1 = Enabled
8
AUX_TO_
SPKP
0
AUX to SPKOUTP select
0 = Disabled
1 = Enabled
7
PGA_TO_
SPKP
0
Speaker PGA Mixer to SPKOUTP select
0 = Disabled
1 = Enabled
6
BYP_TO_PGA
0
Input PGA (ADC bypass) to Speaker PGA Mixer select
0 = Disabled
1 = Enabled
5
MDAC_TO_
PGA
0
Inverted DAC to Speaker PGA Mixer select
0 = Disabled
1 = Enabled
3
DAC_TO_PGA
0
DAC to Speaker PGA Mixer select
0 = Disabled
1 = Enabled
0
AUX_TO_PGA
0
AUX to Speaker PGA Mixer select
0 = Disabled
1 = Enabled
Register 2Bh SPK mixer control1



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