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WM8944BECS/R 数据表(PDF) 165 Page - Cirrus Logic |
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WM8944BECS/R 数据表(HTML) 165 Page - Cirrus Logic |
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165 / 165 page ![]() WM8944B Rev 4.3 165 REVISION HISTORY DATE REV DESCRIPTION OF CHANGES PAGE CHANGED BY 08/10/10 4.0 Product Status updated to Production Data Added comment about ADC volume being in digital filter block Added comment about DAC volume being in digital filter block Updated Notch Filter plots Added note about DAC_VOL_RAMP rate Input PGA to ADC THD max changed from -75dB 28 48 34-35 48 10 BC 24/06/11 4.1 Updated Input resistance for Analogue inputs (IN1, AUX) 10 JJ 06/09/11 4.2 Default value (0) corrected in Register R42 (2Ah) bit [9]. 100 PH 26/06/12 4.2 Noted the notch filter is not usable below 120Hz PH 01/03/16 4.2 Correction to recommended power-up / power-down sequences 102-103 PH 11/11/16 4.3 Package drawing updated to POD 80.B 163 PH |
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