STR720 datasheet(58/401 Pages) STMICROELECTRONICS

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STR720 - ENHANCED INTERRUPT CONTROLLER (EIC)

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Current Interrupt Priority Register (CIPR)

Address Offset: 08h

Reset value: 0000 0000h

The CIP Register reports the priority value of the interrupt currently serviced. There are 16

possible priority values (0 to 15), so the significant register bits are only four (3 down to 0).

After reset, the CIP value is set to ‘0’ and is updated by the EIC logic only after the processor

has started servicing a valid IRQ interrupt request.

To make this happen, some EIC registers must be set as in the following:

•

ICR IRQ_EN =1 (to have the nIRQ signal set)

•

IER not all 0 (at least one interrupt channel must be enabled)

•

among the interrupt channels enabled by the IER register, at least one must have the

SIPL field, of the related SIR register, not set to 0, because the EIC generates a processor

interrupt request (asserting the IRQ line) ONLY IF it detects an enabled interrupt request

whose priority value is bigger than the CIPR (Current Interrupt Priority Register)

value.

When the IRQ line is set, the processor will read the EIC IVR (Interrupt Vector Register), and

this read operation will advise the EIC logic that the ISR (Interrupt Service Routine) has been

initiated and the CIPR register can be properly updated.

The CIPR value can be modified by the processor, to promote a running ISR to a higher level:

the EIC logic will allow a write to the CIP field of any value bigger, or equal, than the priority

value associated to the interrupt channel currently serviced.

E.g.: suppose the IRQ signal is set because of an enabled interrupt request on channel #4,

whose priority value is 7 (i.e. SIPL of SIR7 is 7); after the processor read of IVR register, the

EIC will load the CIP field with 7. Until the interrupt service procedure will be completed,

writes of values 7 up to 15 will be allowed, while attempts to modify the CIP content with

priority lower than 7 will have no effect.

Bit 31:4 = Reserved.

Bit 3:0 = CIP[3:0]: Current Interrupt Priority.

Priority value of the interrupt whose service routine is currently in execution phase.

reserved

765432

reserved

CIP[3:0]

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