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STR720 数据表(PDF) 66 Page - STMicroelectronics |
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STR720 数据表(HTML) 66 Page - STMicroelectronics |
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66 / 401 page  STR720 - ENHANCED INTERRUPT CONTROLLER (EIC) 66/401 7.4.1 Register map Refer to Table 21 on page 50 for the base address. Table 22. EIC register map Addr. Offset Register Name 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 876 5432 10 0 ICR reserved FI Q_ EN IR Q_ EN 4 CICR reserved CIC[4:0] 8 CIPR reserved CIP[3:0] 18 IVR Jump Instruction Opcode or Jump Base Address Jump Offset 1C FIR reserved FIP [2:0] FIE [1:0] 20 IER0 IER[31:0] 40 IPR0 IPR[31:0] 60 SIR0 SIV0[31:16] reserved SIPL0[3:0] 64 SIR1 SIV1[31:16] reserved SIPL1[3:0] 68 SIR2 SIV2[31:16] reserved SIPL2[3:0] 6C SIR3 SIV3[31:16] reserved SIPL3[3:0] 70 SIR4 SIV4[31:16] reserved SIPL4[3:0] 74 SIR5 SIV5[31:16] reserved SIPL5[3:0] 78 SIR6 SIV6[31:16] reserved SIPL6[3:0] 7C SIR7 SIV7[31:16] reserved SIPL7[3:0] 80 SIR8 SIV8[31:16] reserved SIPL8[3:0] 84 SIR9 SIV9[31:16] reserved SIPL9[3:0] 88 SIR10 SIV10[31:16] reserved SIPL10[3:0] 8C SIR11 SIV11[31:16] reserved SIPL11[3:0] 90 SIR12 SIV12[31:16] reserved SIPL12[3:0] 94 SIR13 SIV13[31:16] reserved SIPL13[3:0] 98 SIR14 SIV14[31:16] reserved SIPL14[3:0] 9C SIR15 SIV15[31:16] reserved SIPL15[3:0] A0 SIR16 SIV16[31:16] reserved SIPL16[3:0] A4 SIR17 SIV17[31:16] reserved SIPL17[3:0] A8 SIR18 SIV18[31:16] reserved SIPL18[3:0] AC SIR19 SIV19[31:16] reserved SIPL19[3:0] B0 SIR20 SIV20[31:16] reserved SIPL20[3:0] B4 SIR21 SIV21[31:16] reserved SIPL21[3:0] B8 SIR22 SIV22[31:16] reserved SIPL22[3:0] BC SIR23 SIV23[31:16] reserved SIPL23[3:0] C0 SIR24 SIV24[31:16] reserved SIPL24[3:0] C4 SIR25 SIV25[31:16] reserved SIPL25[3:0] C8 SIR26 SIV26[31:16] reserved SIPL26[3:0] CC SIR27 SIV27[31:16] reserved SIPL27[3:0] D0 SIR28 SIV28[31:16] reserved SIPL28[3:0] D4 SIR29 SIV29[31:16] reserved SIPL29[3:0] D8 SIR30 SIV30[31:16] reserved SIPL30[3:0] DC SIR31 SIV31[31:16] reserved SIPL31[3:0] 1 |
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