STR720 datasheet(81/401 Pages) STMICROELECTRONICS

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STR720 - DMA CONTROLLER (DMAC)

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9 DMA CONTROLLER (DMAC)

9.1 Introduction

The DMA controller provides access to 2 data streams inside STR720 system. Since

peripherals are memory mapped, data transfers from/to peripherals are managed like

memory/memory data transfers.

Each data stream can be associated to one particular peripheral, which triggers a DMA

request starting the data transfer between the corresponding buffers defined in the stream

descriptor. Data stream 3 of DMA controller can alternatively be used as a memory/memory

data transfer triggered by a software DMA request, independently from any peripheral activity.

In case data stream 3 is also associated to a peripheral request, the two modes can be

selected by software.

The DMA controller supports circular buffer management avoiding the generation of interrupts

when the controller reach the end of the source buffer. When a stream is configured in circular

buffer mode and the end of buffer is reached, DMA controller reloads the start address and

continues the transfer until software notifies the end of operations.

The priority between different DMA triggering sources is defined by hardware, source 2 being

the highest priority request and source 3 being the lowest one.

9.2 Main Features

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2 independently configurable streams.

■

Independent source and destination word size, supporting packing and unpacking.

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16 word deep FIFO.

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Support programmable burst size (1, 4, 8, 16 words).

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Support circular buffer management.

STR720 数据表(PDF) 81 Page - STMicroelectronics